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• Power Optimization in Multipliers
  [[File:Power Optimization in Multipliers.jpg|thumb|160px]] ...lemented with standard-cells and that can be automated in order to be used in a synthesis-based flow.
  3 KB (386 words) - 16:23, 30 October 2020
• Low-power chip-to-chip communication network
  In this work, we will assume that we have already an efficient serial interfac ===Status: In Progress ===
  3 KB (492 words) - 12:34, 7 November 2017
• Accelerators for object detection and tracking
  shared-memory cluster realized in 28nm SOI technology. One of the applications for this system is in real-time video applications, expecially
  3 KB (407 words) - 10:57, 5 November 2019
• Hardware Accelerated Derivative Pricing
  other financial institutions invest heavily in grid computing for them in a Monte-Carlo framework for option pricing. A Matlab framework
  3 KB (429 words) - 09:42, 12 October 2017
• Analog Layout Engine
  ...rogramming languages to automatically generate parametrized cells (PCELLS) in Cadence. ===Status: In Progress ===
  2 KB (329 words) - 17:44, 21 December 2017
• Successive Approximation Register (SAR) ADC
  ===Status: In Progress === [[Category:In progress]]
  2 KB (319 words) - 17:43, 21 December 2017
• Assessment of novel photovoltaic architectures by circuit simulation
  ...fy some of the simulation results experimentally. An extension of the work in form of a master thesis or lab assistant is possible. : Interest in circuit simulation
  3 KB (355 words) - 12:07, 17 January 2014
• Processing of 3D Micro-tomography data for Lithium Ion Batteries
  ...mulations on the already obtained data. The student should have experience in computer programming (preferentially image processing or distributed comput ===Status: In Progress ===
  3 KB (472 words) - 12:12, 17 January 2014
• Developing High Efficiency Batteries for Electric Cars
  ...project is a collaboration with MIT and a battery start-up company located in Cambridge, MA. You will carry out your work at the Integrated Systems Labor : Interest in 3D Modelling
  3 KB (389 words) - 12:28, 17 January 2014
• Simulation of Li-ion batteries and comparison with experimental data
  ...e capacity of batteries is becoming a critical issue in our modern society in order to fully exploit the potential of renewable energies such as wind or : Interest in Device Modelling
  3 KB (362 words) - 15:43, 4 September 2019
• Ab-initio Simulation of Strained Thermoelectric Materials
  ...e3, PbTe, or PbSe. If ZT>2 values are obtained, the work will be published in a journal paper. ===Status: In Progress ===
  3 KB (456 words) - 15:43, 4 September 2019
• Implementation of a 2-D model for Li-ion batteries
  Standard 1-D simulation models, as popularized in the mid 90's, are computationally very efficient to fulfill this task, but ===Status: In Progress ===
  3 KB (431 words) - 15:41, 4 September 2019
• Putting Together What Fits Together - GrÆStl
  ...and hash algorithms are two of the most important cryptographic primitives in security protocols. ...alists of the NIST SHA-3 hash competition, which presented its winner late in 2012.
  3 KB (434 words) - 12:01, 26 March 2015
• High-Throughput Authenticated Encryption Architectures based on Block Ciphers
  In order to fulfill today’s high-throughput requirements in secure environments with data rates beyond 100 Gbit/s, so-called authentica ...e of operation (GCM-AES) represents a de-facto standard in the literature. In this project we investigate potential high-speed alternatives to GCM- AES b
  3 KB (392 words) - 12:25, 26 March 2015
• A Multiview Synthesis Core in 65 nm CMOS
  ...9) renders content creation an increasingly difficult process, and results in higher transmission bandwith and storage requirements. Moreover, the number The ASIC developed in this project implements an image domain warping (IDW) based rendering stage
  4 KB (524 words) - 15:49, 13 May 2015
• Feature Extraction with Binarized Descriptors: ASIC Implementation and FPGA Environment
  ...ll image patches around those interest points are extracted and normalized in size. Third, feature descriptors are calculated from those normalized patch ...nses are thresholded in order to yield a binary descriptor, which is small in size and can be matched very efficiently using the Hamming distance.
  3 KB (487 words) - 15:57, 13 May 2015
• Compressed Sensing Reconstruction on FPGA
  ...rithms were found to benefit strongly from parallel processing. Challenges in the design were parallel memory access to provide input for all multipliers ...RTL implementations of the two similar algorithms allowed for comparisons in terms of resource usage and performance. We could show which algorithm perf
  3 KB (389 words) - 18:56, 28 January 2014
• Pirmin Vogel
  ...from the Swiss Federal Institute of Technology Zurich (ETHZ), Switzerland, in 2013 and 2018, respectively. During his Ph.D. his research focus was on dig ...ombination of skills, expertise and vision. Since Nov 2019, Pirmin is back in the Integrated Systems Laboratory where he is working for lowRISC.
  1 KB (193 words) - 15:39, 3 March 2020
• Image Sensor Interface and Pre-processing
  ...o access data from the image sensors. The main part of the project will be in designing the pre-processing stage which will perform a set of filtering an : Interest in video processing and machine learning
  3 KB (357 words) - 18:53, 6 December 2014
• Digitally-Controlled Analog Subtractive Sound Synthesis
  ...th popular synthesizers from Moog Music, Sequential, ARP Instruments, etc. In recent years, building such music synthesizers became accessible and afford ...oftware must be developed in order to control the synthesizer's parameters in real-time.
  5 KB (597 words) - 12:56, 4 December 2021

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