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Showing below up to 20 results in range #21 to #40.

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21. (hist) ‎On-Device Training Sparse Sub-Tensor Update Scheme Optimization for CNN-based tasks ‎[0 bytes]
22. (hist) ‎Test project ‎[0 bytes]
23. (hist) ‎Benchmarking a heterogeneous 217-core MPSoC on HPC applications ‎[0 bytes]
24. (hist) ‎Benchmarking a heterogeneous 217-core MPSoC on HPC applications (M/1-3S)) ‎[0 bytes]
25. (hist) ‎A Post-Simulation Trace-Based RISC-V GDB Debugging Server ‎[0 bytes]
26. (hist) ‎Design of a Scalable High-Performance and Low-Power Interface Based on the I3C Protocol (1M) ‎[0 bytes]
27. (hist) ‎Versatile HW SW Digital PHY for inter chip communication ‎[0 bytes]
28. (hist) ‎Smart Googles for Visual In-Action Feedback in Ski Jumping (1 B/S) ‎[0 bytes]
29. (hist) ‎Smart Goggles for Visual In-Action Feedback in Ski Jumping (1 B/S) ‎[0 bytes]
30. (hist) ‎Creating A Reshuffling Mid-end For Reorganizing Data Inside The Compute Cluster (1-3S/B) ‎[0 bytes]
31. (hist) ‎Design of a Scalable High-Performance and Low-Power Interface Based on the I3C Protocol (B/1-3S) ‎[0 bytes]
32. (hist) ‎Test page ‎[16 bytes]
33. (hist) ‎A Trustworthy Three-Factor Authentication System ‎[40 bytes]
34. (hist) ‎Influence of the Initial FilamentGeometry on the Forming Step in CBRAM ‎[75 bytes]
35. (hist) ‎Theory, Algorithms, and Hardware for Beyond 5G ‎[120 bytes]
36. (hist) ‎Positioning with Wireless Signals ‎[121 bytes]
37. (hist) ‎All-Digital In-Memory Processing ‎[121 bytes]
38. (hist) ‎Real-Time Optimization ‎[121 bytes]
39. (hist) ‎Audio Signal Processing ‎[123 bytes]
40. (hist) ‎Simultaneous Sensing and Communication ‎[123 bytes]

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