Pages that link to "User:Tbenz"
From iis-projects
The following pages link to User:Tbenz:
View (previous 20 | next 20) (20 | 50 | 100 | 250 | 500)- Adding Linux Support to our DMA Engine (1-2S/B) (← links)
- Enhancing our DMA Engine with Vector Processing Capabilities (1-2S/B) (← links)
- Enhancing our DMA Engine with Fault Tolerance (← links)
- Extension and Evaluation of TinyDMA (1-2S/B/2-3G) (← links)
- Fitting Power Consumption of an IP-based HLS Approach to Real Hardware (1-3S) (← links)
- Creating a Free and Open-Source Verification Environment for Our New DMA Engine (1-3S/B) (← links)
- Modeling High Bandwidth Memory for Rapid Design Space Exploration (1-3S/B) (← links)
- Towards Formal Verification of the iDMA Engine (1-3S/B) (← links)
- Developing a Transposition Unit to Accelerate ML Workloads (1-3S/B) (← links)
- Improving SystemVerilog Support for Free And Open-Source EDA Tools (1-3S/B) (← links)
- A Flexible FPGA-Based Peripheral Platform Extending Linux-Capable Systems on Chip (1-3S/B) (← links)
- Towards a Technology-independent and Synthesizable AXI4 Performance Monitoring and Throttling Unit (1-2S) (← links)
- Towards a High-performance Open-source Verification Suite for AXI-based Systems (M/1-3S/B) (← links)
- Design and Implementation of a Fully-digital Platform-independent Integrated Temperature Sensor Enabling DVFS in Open-source Tapeouts (1-3S/B) (← links)
- Creating a Compact Power Supply and Monitoring System for the Occamy Chip (1-3S/B/2-3G) (← links)
- Enhancing Our DMA Engine With Virtual Memory (M/1-3S/B) (← links)
- Extending Our DMA Architecture with SiFives TileLink Protocol (1-3S/B) (← links)
- Finalizing and Releasing Our Open-source AXI4 IPs (1-3S/B/2-3G) (← links)
- Resource Partitioning of RPC DRAM (← links)
- Design of an Energy-Efficient Ethernet Interface for Linux-capable Systems (← links)