Today’s High Performance Computing (HPC) systems are complex architectures requiring on-chip dedicated HW reso
...explore.ieee.org/document/8065010 Energy-Efficient Near-Threshold Parallel Computing: The PULPv2 Cluster]
3 KB (467 words) - 13:55, 12 October 2022
[[Category:High Performance SoCs]]
...many complex applications and take up a large fraction of high-performance computing (HPC) cycles today. They fall in the category of embarassingly parallel com
7 KB (960 words) - 14:25, 2 May 2024
[[Category:High Performance SoCs]]
...hardware, which brings many benefits: it frees processors from explicitly computing addresses and issuing requests, increasing compute throughput. It also deco
3 KB (431 words) - 16:13, 6 November 2022
[[Category:High Performance SoCs]]
...ior of these microservices/functions has been shown to have very different performance characteristics from traditional monolithic applications. For example, a sh
6 KB (905 words) - 21:41, 6 December 2021
...ly trained reduced-precision networks reach similar performance than their high-precision equivalents. In previous projects, we have successfully developed
...-based special-purpose instructions on the PULP platform to accelerate the computing task.
3 KB (317 words) - 14:40, 14 April 2021
===About the Huawei Future Computing Laboratory===
...research laboratory focused on fundamental research in the area of future computing systems (new hardware, new software, new algorithms).
6 KB (799 words) - 11:11, 1 August 2022
[[Category:High Performance SoCs]]
...the RISC-V vector extension specification is introduced for efficiency and performance improvement. Spatz lean Processing Element (PE) acts as an accelerator to a
6 KB (775 words) - 11:57, 31 October 2023
[[Category:High Performance SoCs]]
...e handling such streams in hardware. This frees processors from explicitly computing addresses and issuing requests, increasing compute throughput. It also ''de
3 KB (425 words) - 17:32, 17 November 2021
...ed by wireless links. We want to apply this scenario to a High Performance Computing (HPC) infrastructure for environmental monitoring, aiming at an improving o
...cation (simulations), measuring power-consumption, and assessing detection performance in lab. conditions
5 KB (617 words) - 16:22, 27 February 2018
...with a large double-precision floating-point unit (FPU) optimized for high-performance. Additionally, Snitch features two custom instruction-set-architecture (ISA
4 KB (567 words) - 13:57, 7 September 2022
[[Category:High Performance SoCs]]
...-up-table (LUT) and an addition. That can significantly reduce the overall computing and energy needs.
6 KB (823 words) - 16:32, 3 November 2022
...SoC architectures that combine the versatility of parallel general-purpose computing with the energy efficiency of application-specific hardware accelerators.
3 KB (339 words) - 15:59, 1 November 2023
...dware acceleration of transformer models poses new challenges due to their high arithmetic intensities, large memory requirements, and complex dataflow dep
...rallelism of attention mechanism and 8-bit integer quantization to improve performance and energy efficiency. To maximize ITA’s energy efficiency, we focus on m
3 KB (485 words) - 10:52, 12 December 2023
...eless communication, where massive amounts of data need to be processed at high rates.
[[Category:Event-Driven Computing]]
7 KB (882 words) - 14:33, 28 July 2021
[[Category:High Performance SoCs]]
...ating systems (OSes) – a common technique used in secure systems and cloud computing to allow running untrusted OSes or multiple OSes in parallel.
3 KB (391 words) - 08:49, 21 June 2022
...ty limits in terms of performance and power are being reached, alternative computing paradigms are searched for in which computation and storage are collocated.
...nts on phase-change memory chips comprising more than 1 million devices to high-level algorithmic development in a deep learning framework such as TensorFl
5 KB (628 words) - 12:51, 17 April 2020
...activity in their field of view, they send an alarm to a centralized high-performance vision platform, which is able to pan, tilt and zoom its field of view to t
...egory:Master Thesis]] [[Category:Bachelor Thesis]] [[Category:Event-Driven Computing]] [[Category:Hot]]
3 KB (433 words) - 15:36, 4 August 2022
[[Category:High Performance SoCs]]
...e handling such streams in hardware. This frees processors from explicitly computing addresses and issuing requests, increasing compute throughput. It also ''de
4 KB (557 words) - 16:14, 6 November 2022
...ss communication, in which massive amounts of data need to be processed at high rates.
[[Category:Event-Driven Computing]]
7 KB (933 words) - 19:29, 21 November 2021
[[Category:High Performance SoCs]]
...lerator interface, allowing it to be paired with a powerful FPU to achieve high FPU utilizations and compute-over-control ratio.
8 KB (1,220 words) - 15:18, 9 July 2021
