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Audio Video Preprocessing In Parallel Ultra Low Power Platform

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Short Description

Sample Preprocessing
Architectural diagram with Pre-Processing IP

Audio and video processing on embedded systems has many constraints coming from the fewer available resources. In many cases a lot of resources are consumed during a preprocessing phase in which the raw data coming from the sensor is transformed in a proper way before being fed to the main processing algorithms. This preprocessing, in many cases,could be done very efficiently in hw reducing significantly the load on the CPU. Potential candidates include signal filtering for audio/motion sensor, sub/over sampling, color scheme conversion, image filtering, ciphering and compression/decompression. The hw IP will need to be as much as possible usable by different processing algorithms to maintain as much as possible the general purpouse phylosofy of the whole system.

The goal of this project is to evaluate the best trade off between hw and sw in the preprocessing step for few A/V processing algorithms

Status: Available

Semester/Master Thesis
Supervision: Antonio Pullini, Michael Schaffner


Luca Benini


60% Theory, Algorithms and Simulation
40% HW Design


Good C programming skills
Knowledge of digital circuit design
Knowledge of at least one HDL(VHDL, Verilog, SystemVerilog)


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