Difference between revisions of "Development Of A Test Bed For Ultrasonic Transducer Characterization (1 S/B)"
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| − | [[Image:Transducer_testbed.jpg|thumb]] | + | [[Image:Transducer_testbed.jpg|thumb| Polymere transducer during testing]] |
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===Status: Available === | ===Status: Available === | ||
: Looking for 1 Semester/Bachelor students | : Looking for 1 Semester/Bachelor students | ||
| − | : Contact: [[:User:Cleitne | Christoph Leitner]], [ | + | : Contact: [[:User:Cleitne | Christoph Leitner]], [[:User:Villanif | Federico Villani]] |
===Prerequisites=== | ===Prerequisites=== | ||
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===Status: Completed === | ===Status: Completed === | ||
: Fall Semester 2023 (sem13h2) | : Fall Semester 2023 (sem13h2) | ||
| − | : Contact: [[:User:Cleitne | Christoph Leitner]], [ | + | : Contact: [[:User:Cleitne | Christoph Leitner]], [[:User:Villanif | Federico Villani]] |
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==Detailed Task Description== | ==Detailed Task Description== | ||
The main goal of this work is to develop a modular system for the characterization and tuning of ultrasonic transducers both in hard- and software. | The main goal of this work is to develop a modular system for the characterization and tuning of ultrasonic transducers both in hard- and software. | ||
| + | |||
| + | [[Image:Corbusier_Modulor.png|thumb|right| Modulor - Le Corbusier (adapted from: https://doi.org/10.1002/2475-8876.12147]] | ||
===Goals=== | ===Goals=== | ||
=====Hardware===== | =====Hardware===== | ||
| − | * Development of a customized PCB design for the connection of a vector network analyzer (VNA), amplifier(s), matching network(s), and the device under test (transducer) | + | * Development of a customized PCB design for the connection of a vector network analyzer (VNA), bidirectional coupler(s), amplifier(s), matching network(s), and the device under test (transducer) |
| − | * Characterization of the network blocks using a VNA | + | * Characterization of the network blocks using a VNA (Frequency and Power Analyses) |
=====Software===== | =====Software===== | ||
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[[Category:Digital]] | [[Category:Digital]] | ||
| + | [[Category:UScharacterization]] | ||
[[Category:FlexEmbedded]] | [[Category:FlexEmbedded]] | ||
[[Category:Ultrasound]] | [[Category:Ultrasound]] | ||
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[[Category:Master Thesis]] | [[Category:Master Thesis]] | ||
[[Category:Cleitne]] | [[Category:Cleitne]] | ||
| − | + | [[Category:Villanif]] | |
Latest revision as of 18:18, 21 July 2023
Contents
Short Description
Evaluation and tuning of ultrasonic transducer performances can be realized with the help of a test bench. This setup consists of a physical test bed with the transducer and associated components such as a vector network analyzer, amplifiers and electrical matching networks. A virtual environment models the behavior of these networks. Individual network blocks are built and cascaded as single blackbox models using Python scikit-rf
Due to the intended modularity of the system in soft- and hardware, we can guarantee a high flexibility of the setup. This means that the system can be adapted in operation for a wide variety of transducer types and setups.
Status: Available
- Looking for 1 Semester/Bachelor students
- Contact: Christoph Leitner, Federico Villani
Prerequisites
- Analog Mixed Signal Design
- Network Theory (helpful but not required)
- Python (packages: numpy, scipy, scikit-rf)
- PCB Design
Character
- 20% Literature research
- 40% Programming
- 30% PCB design
- 10% Testing
Professor
Detailed Task Description
The main goal of this work is to develop a modular system for the characterization and tuning of ultrasonic transducers both in hard- and software.
Modulor - Le Corbusier (adapted from: https://doi.org/10.1002/2475-8876.12147
Goals
Hardware
- Development of a customized PCB design for the connection of a vector network analyzer (VNA), bidirectional coupler(s), amplifier(s), matching network(s), and the device under test (transducer)
- Characterization of the network blocks using a VNA (Frequency and Power Analyses)
Software
- Implementation of a modular design in software: Network blocks + building a cascaded network
- Simulation and test
Practical Details
