Difference between revisions of "Enabling Efficient Systolic Execution on MemPool (M)"
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Revision as of 13:53, 27 October 2022
Contents
Overview
Status: In Progress
- Student: Vaibhav Krishna
- Semester: Fall Semester 2022
- Type: Master Thesis
- Professor: Prof. Dr. L. Benini
- Supervisors:
Character
- 15% Literature/architecture review
- 35% RTL implementation
- 30% Evaluation
- 20% Bare-metal C programming
Prerequisites
- Experience with RTL design and evaluation
- Experience with C
Introduction
WIP
Project Description
- A
- a
- B
- b
References
[1] PULP Team, “Banshee GitHub (https://github.com/pulp-platform/snitch/tree/master/sw/banshee).” 2021.
[2] M. Cavalcante, S. Riedel, A. Pullini, and L. Benini, “MemPool: A shared-L1 memory many-core cluster with a low-latency interconnect,” in 2021 design, automation, and test in europe conference and exhibition (DATE), 2021, pp. 701–706.
