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Difference between revisions of "Energy-efficient Circuits for Fully Wireless Brain-machine Interfaces"

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===Status: Available===
===Status: Available===
:Looking for master or semester thesis students
:Looking for master or semester thesis students
:Supervisor: [[:User:gatzeni | Gabriele Atzeni]]
:Supervisor: [[:User:gatzeni | Gabriele Atzeni]] <[]>

Revision as of 18:19, 25 November 2021



Brain-​computer interfaces (BCI) have allowed the treatment of a growing number of ailments and diseases such as epilepsy, depression and paralysis. In this context, brain-​spine interfaces that bypass a spinal cord lesion have directly linked neural activity to electrical stimulation of muscles, restoring locomotion in non-​human primates. In such systems, electromyographic (EMG) recording of the muscle activity is important to form a closed-​loop system with the stimulation unit. The EMG platform should perform several functions, i.e. the EMG recording, signal conditioning, digitization and the wireless communication with the stimulator unit. The EMG platform consists of an analog front-​end, a data converter, a wireless communication system and a wireless power receiver. The low-​noise amplifier (LNA) which serves as the input stage of the analog front-​end is the most power-​hungry building block as it suffers from the most stringent noise specification, while the noise contribution from the other stages is attenuated by the LNA gain. However, because the small form factor and the limited available energy extracted by the wireless power receiver, the power dissipation is also highly constrained. Therefore, a key research goal is to conceive energy-​efficient amplifier architectures to optimize the noise efficiency of the LNA and reduce the power consumption of the system. At the same time, novel wireless power receiver structures should be explored to improve the power transfer efficiency (PTE) while meeting the requirements on the power delivered to the load.

In this project, the student will

1. Study prior art

2. Get familiar with the existing system architecture

3. Design a building-block of his/her choice (LNA, data converter, wireless power receiver, or data transmitter) A more detailed project description will be provided tailored to the type of the project (master or semester).

Status: Available

Looking for master or semester thesis students
Supervisor: Gabriele Atzeni <>


  • Analog Integrated Circuits


  • 20% Literature review
  • 20% Theory
  • 60% Design


Prof. Taekwang Jang <>

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