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- 13:06, 2 November 2020 (diff | hist) . . (+36) . . High Performance SoCs (→Completed Projects)
- 13:05, 2 November 2020 (diff | hist) . . (+36) . . High Performance SoCs (→Projects In Progress)
- 13:05, 2 November 2020 (diff | hist) . . (+36) . . High Performance SoCs (→Available Projects)
- 13:03, 2 November 2020 (diff | hist) . . (-2,444) . . DaCe on Snitch (Blanked the page) (current)
- 13:03, 2 November 2020 (diff | hist) . . (+2,444) . . N DaCe on Snitch (M/1-3S) (Created page with "Category:Digital Category:High Performance SoCs Category:Computer Architecture Category:2020 Category:Master Thesis Category:Semester Thesis Category...")
- 13:02, 2 November 2020 (diff | hist) . . (-2,434) . . SSR combined with FREP in LLVM/Clang (Blanked the page) (current)
- 13:02, 2 November 2020 (diff | hist) . . (+2,434) . . N SSR combined with FREP in LLVM/Clang (M/1-3S) (Created page with "Category:Digital Category:High Performance SoCs Category:Computer Architecture Category:2020 Category:Master Thesis Category:Semester Thesis Category...")
- 13:00, 2 November 2020 (diff | hist) . . (+35) . . N Category:High Performance SoCs (Redirected page to High Performance SoCs) (current)
- 12:59, 2 November 2020 (diff | hist) . . (-3,200) . . Multi issue OoO Ariane Backend (Redirected page to Multi issue OoO Ariane Backend (M)) (current)
- 12:58, 2 November 2020 (diff | hist) . . (+3,248) . . N Multi issue OoO Ariane Backend (M) (Created page with "Category:Digital Category:High Performance SoCs Category:Computer Architecture Category:2020 Category:Master Thesis Category:Semester Thesis Category...")
- 12:56, 2 November 2020 (diff | hist) . . (-8) . . Coherence-Capable Write-Back L1 Data Cache for Ariane (Redirected page to Coherence-Capable Write-Back L1 Data Cache for Ariane (M)) (current)
- 12:55, 2 November 2020 (diff | hist) . . (+2,789) . . N Coherence-Capable Write-Back L1 Data Cache for Ariane (M) (Created page with "Category:Digital Category:High Performance SoCs Category:Computer Architecture Category:2020 Category:Master Thesis Category:Semester Thesis Category...")
- 12:55, 2 November 2020 (diff | hist) . . (-2,710) . . Coherence-Capable Write-Back L1 Data Cache for Ariane (Redirected page to Editing Coherence-Capable Write-Back L1 Data Cache for Ariane (M))
- 12:48, 2 November 2020 (diff | hist) . . (+5,092) . . N Implementation of a Heterogeneous System for Image Processing on an FPGA (S) (Created page with "== Introduction == Heterogeneous systems combine a general-purpose host processor with domain-specific Programmable Many-Core Accelerators (PMCAs). Such systems are highly ve...")
- 12:48, 2 November 2020 (diff | hist) . . (-5,092) . . Implementation of a Heterogeneous System for Image Processing on an FPGA (Blanked the page) (current)
- 12:18, 2 November 2020 (diff | hist) . . (+11,105) . . N A Snitch-based Compute Accelerator for HERO (M/1-2S) (Created page with "<!-- (M/1-2S): A Snitch-based Compute Accelerator for HERO --> = Overview = == Status: In progress == * Type: Semester Thesis * Semester: Autumn Semester 2020 * Student: No...")
- 12:17, 2 November 2020 (diff | hist) . . (-11,200) . . (M/1-2S): A Snitch-based Compute Accelerator for HERO (Blanked the page)
- 12:17, 2 November 2020 (diff | hist) . . (+11,721) . . N A Flexible Peripheral System for High-Performance Systems on Chip (M) (Created page with "<!-- (M): A Flexible Peripheral System for High-Performance Systems on Chip --> = Overview = == Status: In progress == * Type: Master Thesis * Semester: Autumn Semester 202...")
- 12:16, 2 November 2020 (diff | hist) . . (-11,726) . . (M): A Flexible Peripheral System for High-Performance Systems on Chip (Blanked the page) (current)
- 11:15, 2 November 2020 (diff | hist) . . (-2,660) . . IBM A2O Core (Blanked the page) (current)
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