User contributions

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• 10:20, 27 June 2022 (diff | hist) . . (-2)‎ . . Creating a Free and Open-Source Verification Environment for Our New DMA Engine (1-3S/B) ‎ (→‎Introduction) (current)
• 10:20, 27 June 2022 (diff | hist) . . (-1)‎ . . m Creating a Free and Open-Source Verification Environment for Our New DMA Engine (1-3S/B) ‎ (→‎Introduction)
• 10:19, 27 June 2022 (diff | hist) . . (+1,621)‎ . . N Creating a Free and Open-Source Verification Environment for Our New DMA Engine (1-3S/B) ‎ (Created page with "<!-- Creating Creating a Free and Open-Source Verification Environment for Our New DMA Engine (1-3S/B) --> Category:Digital Category:High Performance SoCs Category:...")
• 12:56, 21 June 2022 (diff | hist) . . (+1)‎ . . Extension and Evaluation of TinyDMA (1-2S/B/2-3G) ‎ (current)
• 12:55, 21 June 2022 (diff | hist) . . (-1)‎ . . Extension and Evaluation of TinyDMA (1-2S/B/2-3G) ‎
• 12:53, 21 June 2022 (diff | hist) . . (+1,928)‎ . . N Fitting Power Consumption of an IP-based HLS Approach to Real Hardware (1-3S) ‎ (Created page with "<!-- Creating Fitting Power Consumption of an IP-based HLS Approach to Real Hardware (1-3S) --> Category:Digital Category:High Performance SoCs Category:Computer Ar...") (current)
• 12:27, 21 June 2022 (diff | hist) . . (+2,189)‎ . . N Extension and Evaluation of TinyDMA (1-2S/B/2-3G) ‎ (Created page with "<!-- Creating Extension and Evaluation of TinyDMA (1-2S/B/2-3G) --> Category:Digital Category:High Performance SoCs Category:Computer Architecture Category:2022...")
• 12:13, 21 June 2022 (diff | hist) . . (-2)‎ . . Enhancing our DMA Engine with Vector Processing Capabilities (1-2S/B) ‎ (current)
• 12:12, 21 June 2022 (diff | hist) . . (-2)‎ . . Adding Linux Support to our DMA Engine (1-2S/B) ‎ (current)
• 11:50, 15 February 2022 (diff | hist) . . (+3)‎ . . Enhancing our DMA Engine with Vector Processing Capabilities (1-2S/B) ‎
• 11:50, 15 February 2022 (diff | hist) . . (+3)‎ . . m Augmenting Our IPs with AXI Stream Extensions (M/1-2S) ‎ (current)
• 11:49, 15 February 2022 (diff | hist) . . (0)‎ . . m Adding Linux Support to our DMA Engine (1-2S/B) ‎
• 11:47, 15 February 2022 (diff | hist) . . (+3)‎ . . m Adding Linux Support to our DMA Engine (1-2S/B) ‎
• 18:11, 6 January 2022 (diff | hist) . . (+147)‎ . . Fault Tolerance ‎ (current)
• 17:35, 6 January 2022 (diff | hist) . . (0)‎ . . N Category:2022 ‎ (Created blank page) (current)
• 17:34, 6 January 2022 (diff | hist) . . (0)‎ . . Enhancing our DMA Engine with Vector Processing Capabilities (1-2S/B) ‎
• 17:30, 6 January 2022 (diff | hist) . . (+2,828)‎ . . N Enhancing our DMA Engine with Vector Processing Capabilities (1-2S/B) ‎ (Created page with "<!-- Enhancing our DMA Engine with Vector Processing Capabilities (1-2S/B) --> Category:Digital Category:High Performance SoCs Category:Computer Architecture Ca...")
• 11:23, 3 January 2022 (diff | hist) . . (-1)‎ . . Adding Linux Support to our DMA Engine (1-2S/B) ‎
• 17:27, 19 November 2021 (diff | hist) . . (-1,734)‎ . . Adding Linux Support to our DMA engine (1-2S/B) ‎ (Redirected page to Adding Linux Support to our DMA Engine (1-2S/B)) (current)
• 17:26, 19 November 2021 (diff | hist) . . (+1,795)‎ . . N Adding Linux Support to our DMA Engine (1-2S/B) ‎ (Created page with "Category:Digital Category:High Performance SoCs Category:Computer Architecture Category:2021 Category:Semester Thesis Category:Bachelor Thesis Catego...")
• 17:24, 19 November 2021 (diff | hist) . . (-3)‎ . . Adding Linux Support to our DMA engine (1-2S/B) ‎
• 17:23, 19 November 2021 (diff | hist) . . (+1,273)‎ . . Adding Linux Support to our DMA engine (1-2S/B) ‎
• 17:20, 19 November 2021 (diff | hist) . . (+525)‎ . . N Adding Linux Support to our DMA engine (1-2S/B) ‎ (Created page with "Category:Digital Category:High Performance SoCs Category:Computer Architecture Category:2021 Category:Semester Thesis Category:Bachelor Thesis Catego...")
• 17:10, 19 November 2021 (diff | hist) . . (+4,347)‎ . . N Counter-based Fast Power Estimation using FPGAs (M/1-3S) ‎ (Created page with "Category:Digital Category:High Performance SoCs Category:Computer Architecture Category:2021 Category:Semester Thesis Category:Master Thesis Category...")
• 16:48, 19 November 2021 (diff | hist) . . (0)‎ . . High Performance SoCs ‎ (→‎Who are we)
• 13:35, 15 November 2021 (diff | hist) . . (0)‎ . . User:Smazzola ‎
• 13:34, 15 November 2021 (diff | hist) . . (+392)‎ . . N User:Smazzola ‎ (Created page with "== Sergio Mazzola == ==Available Projects== <DynamicPageList> supresserrors = true category = Available category = Matheusd </DynamicPageList> ==Projects In Progress== <Dyna...")
• 13:33, 15 November 2021 (diff | hist) . . (0)‎ . . N File:Smazzola face 1to1.png ‎ (current)
• 13:31, 15 November 2021 (diff | hist) . . (+260)‎ . . High Performance SoCs ‎ (→‎Who are we)
• 13:15, 15 November 2021 (diff | hist) . . (+49)‎ . . RISC-V base ISA for ultra-low-area cores (2-3G) ‎ (current)
• 20:11, 15 February 2021 (diff | hist) . . (-4)‎ . . LLVM and DaCe for Snitch (1-2S) ‎ (→‎Status: In progress)
• 20:10, 15 February 2021 (diff | hist) . . (-1)‎ . . LLVM and DaCe for Snitch (1-2S) ‎ (→‎Status: In progress)
• 20:09, 15 February 2021 (diff | hist) . . (0)‎ . . N User:Alexandru.calotoiu ‎ (Created blank page) (current)
• 20:08, 15 February 2021 (diff | hist) . . (+37)‎ . . Software-Defined Paging in the Snitch Cluster (2-3S) ‎ (current)
• 20:06, 15 February 2021 (diff | hist) . . (+62)‎ . . SSR combined with FREP in LLVM/Clang (M/1-3S) ‎ (Redirected page to LLVM and DaCe for Snitch (1-2S)) (current)
• 20:05, 15 February 2021 (diff | hist) . . (+62)‎ . . DaCe on Snitch (M/1-3S) ‎ (Redirected page to LLVM and DaCe for Snitch (1-2S)) (current)
• 20:03, 15 February 2021 (diff | hist) . . (+58)‎ . . Snitch meets iCE40 (1-2S/B) ‎ (Redirected page to A Snitch-Based SoC on iCE40 FPGAs (1-2S/B)) (current)
• 20:01, 15 February 2021 (diff | hist) . . (+7)‎ . . Snitch meets iCE40 (1-2S/B) ‎
• 20:00, 15 February 2021 (diff | hist) . . (+3)‎ . . Quest for the smallest Turing-complete core (2-3G) ‎
• 20:00, 15 February 2021 (diff | hist) . . (+1)‎ . . Quest for the smallest Turing-complete core (2-3G) ‎
• 20:00, 15 February 2021 (diff | hist) . . (+3)‎ . . Quest for the smallest Turing-complete core (2-3G) ‎
• 19:59, 15 February 2021 (diff | hist) . . (+39)‎ . . N Outdated pitches ‎ (Redirected page to Category:Outdated pitches) (current)
• 19:54, 15 February 2021 (diff | hist) . . (+8)‎ . . Quest for the smallest Turing-complete core (2-3G) ‎
• 19:52, 15 February 2021 (diff | hist) . . (0)‎ . . N Category:Outdated pitches ‎ (Created blank page) (current)
• 19:51, 15 February 2021 (diff | hist) . . (+8)‎ . . Snitch meets iCE40 (1-2S/B) ‎
• 19:47, 15 February 2021 (diff | hist) . . (+124)‎ . . A Snitch-Based SoC on iCE40 FPGAs (1-2S/B) ‎
• 19:45, 15 February 2021 (diff | hist) . . (+8,260)‎ . . N A Snitch-Based SoC on iCE40 FPGAs (1-2S/B) ‎ (create)
• 14:27, 18 January 2021 (diff | hist) . . (+2)‎ . . An RPC DRAM Implementation for Energy-Efficient ASICs (1-2S) ‎ (→‎Status: Available)
• 15:59, 12 January 2021 (diff | hist) . . (-1)‎ . . Bringup and Evaluation of an Energy-efficient Heterogeneous Manycore Compute Platform (1-2S) ‎
• 19:00, 18 December 2020 (diff | hist) . . (0)‎ . . N File:Rpc dram.png ‎ (current)

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