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Design of an Energy-Efficient Ethernet Interface for Linux-capable Systems

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Status: Available

Project Description and Objectives

Ethernet is a family of wired computer networking technologies commonly used in local area networks (LAN), metropolitan area networks (MAN) and wide area networks (WAN) [1]. It was commercially introduced in 1980 and first standardized in 1983 as IEEE 802.3

Throughout its history, Ethernet data transfer rates have been increased from the original 2.94 Mbit/s [2] to the latest 400 Gbit/s, with rates up to 1.6 Tbit/s under development. The Ethernet standards include several wiring and signalling variants of the OSI physical layer.

Since its inception, Ethernet has enjoyed remarkable growth. Today, hundreds of millions of Ethernet switch ports ship every year. Initially intended to connect computers on local networks, Ethernet applications now range from global telecommunications and supercomputing to industrial automation and avionics, including embedded computing products that nowadays feature at least one Ethernet interface. Ethernet standards have been defined for a wide range of speeds and transmission media to meet the needs of these diverse applications.

Systems communicating over Ethernet divide a stream of data into shorter pieces called frames. Each frame contains the source and destination addresses and error-checking data so that damaged frames can be detected and discarded; most often, higher-layer protocols trigger the retransmission of lost frames.

This project aims to improve the design of an Ethernet interface from a performance, power and area perspective, to meet the speed, bandwidth and flexibility requirements of automotive, aerial and other embedded applications. Interested students might conclude the project by investigating the challenges and opportunities of using Ethernet in real-time systems for automotive-oriented applications [3].

Technical Activities

To achieve the project's goals, the student is required to complete the following activities:

  • Study the Ethernet protocol, existing implementations and verification environments;
  • Design the Ethernet peripheral;
  • Verify the functionality through;
  • Integrate the IP into a full SoC system through an AXI-based DMA controller;
  • Extend the Linux driver according to the HW modifications/improvements.

Weekly Reports

The student is required to write a weekly report at the end of each week and send it to his advisors by email. The weekly report aims to briefly summarize the work, progress, and any findings made during the week, plan the actions for the next week, and discuss open questions and points. For software programming benchmarks, we strongly recommend creating a google-sheet and plotting the results to trace your benchmark results.

Learning Opportunities

The student will gain advanced knowledge on I/O SoC communication, from hardware and firmware perspectives. The student will work in a team of PhDs and post-doc researchers and will be fully supported along the entire duration of the project. Moreover, the student will practice with commercial tools for hardware design.


  • 10% Study state-of-the-art and existing HDL code
  • 40% Hardware design
  • 15% Functional testing
  • 20% Firmware design
  • 5% Evaluation and Documentation
  • 5% Final Report


  • Interest in deepening system I/O communication topics
  • Experience with digital design in SystemVerilog as taught in VLSI I
  • Good knowledge of C and Assembly
  • Experience with Unix commands
  • Preferred: Experience with bash scripting
  • Preferred (not strictly required): Knowledge of the AXI4 protocol


[1] Ethernet1:

[2] Ethernet2:

[3] Real-Time Ethernet: