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- 17:19, 24 March 2015 (diff | hist) . . (+28) . . N File:RazorEDGE.png (RazorEDGE ASIC with testbed.) (current)
- 10:52, 24 March 2015 (diff | hist) . . (0) . . m Channel Shortening Prefilter (Weberbe moved page Channel Shortening ASIC to Channel Shortening Prefilter)
- 10:52, 24 March 2015 (diff | hist) . . (+42) . . N Channel Shortening ASIC (Weberbe moved page Channel Shortening ASIC to Channel Shortening Prefilter) (current)
- 10:42, 24 March 2015 (diff | hist) . . (+995) . . Channel Shortening Prefilter
- 10:24, 24 March 2015 (diff | hist) . . (+120) . . N File:ChannelShortening.png (A channel shortening prefilter concentrates the energy of the channel impulse response (CIR) towards the first few taps.) (current)
- 18:51, 23 March 2015 (diff | hist) . . (-797) . . Channel Shortening Prefilter
- 18:48, 23 March 2015 (diff | hist) . . (+1,787) . . N Channel Shortening Prefilter (Created page with "!--thumb|230px---> ==Short Description== In mobile communications, such as in the latest 3G standards, mobile phones usually operate in unfavorable enviro...")
- 17:32, 23 March 2015 (diff | hist) . . (+21) . . An FPGA-Based Testbed for 3G Mobile Communications Receivers
- 17:10, 18 March 2015 (diff | hist) . . (+69) . . N Digital Front End Design for Narrowband LTE Systems (Weberbe moved page Digital Front End Design for Narrowband LTE Systems to Time and Frequency Synchronization in LTE Cat-0 Devices) (current)
- 17:10, 18 March 2015 (diff | hist) . . (0) . . m Time and Frequency Synchronization in LTE Cat-0 Devices (Weberbe moved page Digital Front End Design for Narrowband LTE Systems to Time and Frequency Synchronization in LTE Cat-0 Devices)
- 10:31, 18 March 2015 (diff | hist) . . (0) . . Time and Frequency Synchronization in LTE Cat-0 Devices (→Status: Completed)
- 10:52, 17 March 2015 (diff | hist) . . (+106) . . N Design and VLSI Implementation of a Constrained-Viterbi Algorithm for 3GPP TD-HSPA (Weberbe moved page Design and VLSI Implementation of a Constrained-Viterbi Algorithm for 3GPP TD-HSPA to Design and VLSI Implementation of a Constrained-Viterbi Algorithm Equalizer for 3GPP TD-HSPA: real title) (current)
- 10:52, 17 March 2015 (diff | hist) . . (0) . . m Design and VLSI Implementation of a Constrained-Viterbi Algorithm Equalizer for 3GPP TD-HSPA (Weberbe moved page Design and VLSI Implementation of a Constrained-Viterbi Algorithm for 3GPP TD-HSPA to Design and VLSI Implementation of a Constrained-Viterbi Algorithm Equalizer for 3GPP TD-HSPA: real title)
- 10:50, 17 March 2015 (diff | hist) . . (+93) . . Design and VLSI Implementation of a Constrained-Viterbi Algorithm Equalizer for 3GPP TD-HSPA
- 10:43, 17 March 2015 (diff | hist) . . (+26) . . Time and Frequency Synchronization in LTE Cat-0 Devices
- 13:04, 10 March 2015 (diff | hist) . . (+22) . . Receiver design for the DigRF 4G high speed serial link
- 13:03, 10 March 2015 (diff | hist) . . (+22) . . LTE-Advanced RF Front-end Design in 28nm CMOS Technology
- 13:03, 10 March 2015 (diff | hist) . . (+30) . . N Category:Sporrerb (Redirected page to Benjamin Sporrer) (current)
- 13:02, 10 March 2015 (diff | hist) . . (+21) . . High Performance Cellular Receivers in Very Advanced CMOS (current)
- 13:01, 10 March 2015 (diff | hist) . . (+567) . . N Benjamin Sporrer (Created page with "==Available Projects== <DynamicPageList> supresserrors = true category = Available category = Sporrerb </DynamicPageList> ==Projects in Progress== <DynamicPageList> supresserr...") (current)
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