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• User:Gautschi
  ==Michael Gautschi== * '''e-mail''': [mailto:gautschi@newacp.ch gautschi@newacp.ch]
  363 bytes (38 words) - 12:37, 1 May 2020

Page text matches

• Ultra-low power processor design
  : Supervisors: [[:User:Kgf|Frank K. Gurkaynak]], [[:User:gautschi|Michael Gautschi]]
  10 KB (1,669 words) - 19:01, 30 January 2014
• User:Gautschi
  ==Michael Gautschi== * '''e-mail''': [mailto:gautschi@newacp.ch gautschi@newacp.ch]
  363 bytes (38 words) - 12:37, 1 May 2020
• Design and Implementation of an Approximate Floating Point Unit
  : Youri Popoff, Florian Scheidegger, Lukas Mueller, Thomas Gautschi, Mario Burger, Fabian Schuiki
  3 KB (377 words) - 10:58, 21 February 2018
• Design of a VLIW processor architecture based on RISC-V
  : Supervisors: [[:User:gautschi|Michael Gautschi]]
  3 KB (377 words) - 10:25, 5 November 2019
• Design of a Fused Multiply Add Floating Point Unit
  : Supervisors: [[:User:gautschi|Michael Gautschi]], [[:User:schaffner|Michael Schaffner]]
  2 KB (346 words) - 10:26, 5 November 2019
• NVDLA meets PULP
  * [Gautschi2017] Gautschi, Michael, et al. "Near-threshold RISC-V core with DSP extensions for scalab
  6 KB (799 words) - 13:42, 10 November 2020
• MemPool on HERO (1S)
  # M. Gautschi, P. D. Schiavone, A. Traber, I. Loi, A. Pullini, D. Rossi, E. Flamand, F. K
  6 KB (902 words) - 19:07, 20 January 2021
• ISA extensions in the Snitch Processor for Signal Processing (M)
  [6] M. Gautschi ''et al.'', “Near-threshold RISC-V core with DSP extensions for scalable
  9 KB (1,311 words) - 00:08, 13 March 2021
• Ottocore: A Minimal RISC-V Core Designed for Teaching (B/2G)
  ...ass="csl-left-margin">&#91;3&#93; </span><span class="csl-right-inline">M. Gautschi ''et al.'', <span>“Near-threshold RISC-v core with DSP extensions for sca
  10 KB (1,521 words) - 15:21, 9 July 2021
• Peripheral Event Linking System for Real-time Capable Energy Efficient SoCs
  ...nes an energy efficient 5-stage single-issue in-order RV32IMC RISC-V core (Gautschi et al. 2017) with common microcontroller peripherals like UART, SPI, I2C or
  8 KB (1,127 words) - 19:54, 1 March 2023
• Evaluating The Use of Snitch In The PsPIN RISC-V In-network Accelerator (M)
  ...vide, Francesco Conti, Andrea Marongiu, Antonio Pullini, Igor Loi, Michael Gautschi, Giuseppe Tagliavini, Alessandro Capotondi, Philippe Flatresse, and Luca Be
  3 KB (374 words) - 10:24, 3 November 2023