Pages that link to "Design Review"
From iis-projects
The following pages link to Design Review:
Displayed 50 items.
View (previous 50 | next 50) (20 | 50 | 100 | 250 | 500)- Minimal Cost RISC-V core (← links)
- Design of a Fused Multiply Add Floating Point Unit (← links)
- Towards The Integration of E-skin into Prosthetic Devices (← links)
- A Wireless Sensor Network for a Smart Building Monitor and Control (← links)
- A Wearable System To Control Phone And Electronic Device Without Hands (← links)
- Passive and Self Sustaining Receivers For On and Intra Body Communication For Wearable Sensors Networks (← links)
- Charging System for Implantable Electronics (← links)
- Bringing XNOR-nets (ConvNets) to Silicon (← links)
- Improving our Smart Camera System (← links)
- Ultra Low-Power Oscillator (← links)
- High performance continous-time Delta-Sigma ADC for biomedical applications (← links)
- Design of low-offset dynamic comparators (← links)
- Radio Signal Direction Detection For Smart Glasses For Augmented Reality Applications (← links)
- Desing and Implementation Of Long Lasting Key Finder With Bleetooth Low Energy (← links)
- High Power Efficient Digitally Controlled Oscillator Design for Cellular IOT (← links)
- High Performance Digitally-Assisted Time Domain ADC Design for DPLL used in Cellular IOT (← links)
- Analysis and Design of Power Efficient RF/ mm-Wave LC-tank Oscillator in 28nm for 5G communication applications (← links)
- Design of Charge-Pump PLL in 22nm for 5G communication applications (← links)
- Sensor Fusion for Rockfall Sensor Node (← links)
- Interfacing PULP with a Brain-Inspired Ultra-Low Power Spiking Cochlea (← links)
- Towards Online Training of CNNs: Hebbian-Based Deep Learning (← links)
- Single-Bit-Synapse Spiking Neural System-on-Chip (← links)
- Deep-Learning Based Phoneme Recognition from a Ultra-Low Power Spiking Cochlea (← links)
- Tiny CNNs for Ultra-Efficient Object Detection on PULP (← links)
- Smart Wearable System For Vital Sign Monitoring Exploiting On Board and Cloud Machine Learning (← links)
- Autonomous Sensing For Trains In The IoT Era (← links)
- High performance continuous-time Delta-Sigma ADC for magnetic resonance imaging (← links)
- 5G Cellular RF Front-end Design in 22nm CMOS Technology (← links)
- Energy-Efficient Brain-Inspired Hyperdimensional Computing (← links)
- Hardware Accelerators for Lossless Quantized Deep Neural Networks (← links)
- Low-Energy Cluster-Coupled Vector Coprocessor for Special-Purpose PULP Acceleration (← links)
- Embedded Audio Source Localization Exploiting Coincidence Detection in Asynchronous Spike Streams (← links)
- A computational memory unit using phase-change memory devices (← links)
- Deep Learning for Brain-Computer Interface (← links)
- Variable Bit Precision Logic for Deep Learning and Artificial Intelligence (← links)
- Resilient Brain-Inspired Hyperdimensional Computing Architectures (← links)
- Trace Debugger for custom RISC-V Core (← links)
- Efficient Search Design for Hyperdimensional Computing (← links)
- Creating a HDMI Video Interface for PULP (← links)
- Autonomous Sensors For Underwater Monitoring In Smart Navy Systems (← links)
- Hyper Meccano: Acceleration of Hyperdimensional Computing (← links)
- A Wireless Sensor Network for HPC monitoring (← links)
- Neural Networks Framwork for Embedded Plattforms (← links)
- Real-Time Implementation of Quantum State Identification using an FPGA (← links)
- CMOS power amplifier for field measurements in MRI systems (← links)
- Design of a 25 Gbps SerDes for optical chip-to-chip communication (← links)
- Inductive Charging Circuit for Implantable Devices (← links)
- Low Power Geolocalization And Indoor Localization (← links)
- Low Power One bit Microphone for Acoustic Imaging Using A Parallel Processor (← links)
- High Speed FPGA Trigger Logic for Particle Physics Experiments (← links)