...h in 2020 and 2021, respectively. Since summer 2021, I am pursuing a Ph.D. in the Circuits and Systems group of Prof. Luca Benini.
* Reliability in SoCs
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===Projects In Progress===
category = In progress
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In an ASIC (Application Specific Integrated Circuit) project you will be worki
...nding on the project, your design may be sent for manufacturing to be used in future projects.
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[[Category:In progress]]
== Status: In Progress ==
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==Projects in Progress==
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...from the Swiss Federal Institute of Technology Zurich (ETHZ), Switzerland, in 2013 and 2018, respectively. During his Ph.D. his research focus was on dig
...ombination of skills, expertise and vision. Since Nov 2019, Pirmin is back in the Integrated Systems Laboratory where he is working for lowRISC.
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==Projects in Progress==
category = In progress
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...eld of cryptography. Feel free to contact them if you want to do a project in this field.
<!-- ==Projects in Progress==
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...ted my B.Sc. and M.Sc. in Electronics Engineering at Politecnico di Milano in July 2019 and December 2021, respectively.
Since March 2022, I am pursuing a Ph.D. in the Circuits and Systems group of Prof. Luca Benini.
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We are in the processes of creating a top-level information page, in the meantime please continue directly to the specific subsections below.
Please continue to [[Real-Time Embedded Systems]] if you are interested in designing hardware or writing software for timing predictable embedded syst
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category = In progress
category = In progress
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[[File:Hardware support for IDE in multicore.jpg|thumb]]
===Status: In Progress ===
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...ors, however they can induce a large overhead or are not always applicable in case data changes. Furthermore, for certain applications (e.g. handling imp
===Projects In Progress===
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...of generating and acquiring signals used in 'photoplethysmography' (PPG). In this thesis, the goal is to '''create''' a new Fachpraktikum where students
Each improvement step is compared in size and power with the previous version.
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...on the same chip as the host CPU, sharing a single DRAM. This has benefits in both programability and performance, due to the removal of the need for dat
...l-time guarantees can be provided, enabling the use of these architectures in a real-time setting.
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[[Category:In progress]]
== Status: In Progress ==
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[[Category:In progress]]
== Status: In Progress ==
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[[Category:In progress]]
== Status: In Progress ==
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In December 2010, the 5 finalists of the SHA-3 competition were announced. The
: Interest in Cryptography
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...tching clock. As a result, the circuit persists in an unstable equilibrium in metastability, which influences the correctness of the data and the power c
...against metastability, but it does not ensure the correctness of the data. In this project, the student will explore a novel approach that employs passiv
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