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• High Speed FPGA Trigger Logic for Particle Physics Experiments
  ...pa.phys.ethz.ch/ Physics Department of ETH Zurich]. If you are experienced in FPGA programming (VHDL) and want to spice up your knowledge with a real wor ...ssues a signal for data taking or not). The Xilinx AC701 Development Board in combination with a recently designed and build interface board (see picture
  4 KB (460 words) - 21:42, 30 January 2018
• Satellite Internet of Things
  ...d in fact the extended-coverage would enable communication with satellites in Low Earth Orbits (LEO). But, the NB-IoT standard is optimized for slowly mo ...able the identification of critical bottlenecks. These shall be eliminated in the second part of the project by algorithmic optimizations and/or changes
  3 KB (393 words) - 13:53, 13 November 2020
• Neural Networks Framwork for Embedded Plattforms
  ...like Torch or Tensorflow to evaluate and train the network and export it in a compilable form for efficient inference on the previously mentioned platf [[Category:In progress]]
  3 KB (317 words) - 14:40, 14 April 2021
• BLISS - Battery-Less Identification System for Security
  ...the significant power consumption prevent this technology to be exploited in small, wearable, battery-powered and autonomous devices. ...task, the project is split into 2 projects, which can possibly be combined in the end.
  4 KB (602 words) - 10:45, 31 January 2023
• HERO: TLB Invalidation
  ...stantial number of tape outs of various single-cluster PULP configurations in multiple technology nodes. ...formance, e.g., to use use PULP as a high-performance parallel accelerator in heterogeneous systems. To this end, we also study the seamless integration
  6 KB (796 words) - 17:19, 18 November 2019
• Shared Correlation Accelerator for an RF SoC
  ...rk synchronization rely on performing a large number of cross-correlations in real-time. Due to the large throughput requirements, large accelerators are ...cross-correlations. Using this knowledge, you will develop the accelerator in VHDL, or using High-Level Synthesis (HLS). It should be able to meet the th
  3 KB (421 words) - 09:38, 14 September 2018
• Deep Convolutional Autoencoder for iEEG Signals
  In this thesis, the students will develop a deep convolutional autoencoder to * project report (in digital form; a hard copy also welcome, but not necessary)
  5 KB (641 words) - 13:36, 9 September 2020
• Heterogeneous SoCs
  ...le:Apple_heterogeneous_integration.png|700px|thumb|center|Uniting many ICs in a single one: Heterogeneous integration has allowed (not only) Apple to get ...currently one of the main drivers for performance-per-energy advancements in various application domains.
  3 KB (421 words) - 18:41, 28 October 2020
• Event-Driven Computing
  ...orth to run expensive computations or whether there is not enough activity in the environment. This approach is called event-driven computing. ===Projects In Progress===
  2 KB (266 words) - 11:16, 5 November 2020
• Predictable Execution
  ...on the same chip as the host CPU, sharing a single DRAM. This has benefits in both programability and performance, due to the removal of the need for dat ...l-time guarantees can be provided, enabling the use of these architectures in a real-time setting.
  2 KB (286 words) - 18:48, 10 November 2020
• Aliasing-Free Wavetable Music Synthesizer
  ...digital signal processors (DSPs) or field-programmable gate arrays (FPGAs) in order to generate the wavetable synthesis oscillator signals, to the best o ...LAB with the goal of minimizing aliasing while offering great flexibility. In the second step, a VLSI architecture and ASIC will be designed. The goal is
  5 KB (621 words) - 18:09, 9 October 2022
• Modular Frequency-Modulation (FM) Music Synthesizer
  ...IC that provides a large number of freely programmable operators resulting in endless sound-design possibilities compared to existing FM synthesizers. ...imultaneous voices). Third, the student(s) will implement the architecture in a modern CMOS process and send the modular FM synthesis ASIC to fabrication
  5 KB (549 words) - 12:35, 28 November 2022
• Digital Medical Ultrasound Imaging
  ...s include the efficient processing and transmission of this data off-head. In addition, we are actively working on developing strategies to manage the po ...project area. If you are interested in the topic and want to do something in the areas mentioned above, come to see us to discuss up-to-date project opp
  6 KB (797 words) - 16:16, 23 February 2024
• Hyperdimensional Computing
  ...at can enable fast and one-shot learning (no need of back-propagation like in neural networks). Furthermore it is memory-centric with embarrassingly para ...and one-shot learning make HD computing a prime candidate for utilization in application domains such as: brain-computer interfaces, biosignal processin
  10 KB (1,341 words) - 10:46, 25 April 2018
• Level Crossing ADC For a Many Channels Neural Recording Interface
  ...tal Converters (LC-ADC) could reduce the amount of information to transfer in case of low activity of the input signal, compared to more common Uniform-S In this project, it is proposed to the student the implementation of a low-pow
  4 KB (616 words) - 19:10, 29 January 2021
• Integrated Information Processing
  ...thz.ch Integrated Information Processing (IIP) Group] carries out research in the following areas: rect 2853 1 3702 740 [[All-Digital In-Memory Processing]]
  7 KB (814 words) - 16:53, 8 January 2024
• Neural Network Algorithms and Interfaces with Accelerators for Embedded Platforms with Real World Applications
  ...networks and other machine learning approaches accurately predict patterns in image and time-based data when large historical datasets with curated datas ...y living of elderly and to evaluate psychological and physiological stress in firemen by using leading hardware (HW) accelerators.
  7 KB (1,003 words) - 17:30, 6 December 2021
• Andreas Kurth
  ==Projects in Progress== category = In progress
  1 KB (123 words) - 07:40, 11 June 2021
• CMOS power amplifier for field measurements in MRI systems
  ...modalities in medical diagnostics and research. One of the foremost trends in MRI technology has been multiple‐channel signal acquisition with detector ...amplifier is necessary. In this project such an amplifier (NMR Probe Amp. in the picture) will be designed an ev. also implemented. The thesis offers th
  3 KB (354 words) - 16:06, 6 May 2019
• Real-Time Implementation of Quantum State Identification using an FPGA
  ...much more efficiently than current computer technology for certain tasks. In this project, your goal will be to implement real-time quantum state identi ...u will use a Virtex-6 FPGA to perform quantum signal processing operations in real time, and an FMC110 ADC board to sample analog signal outputs of Circu
  5 KB (599 words) - 09:03, 21 December 2017

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