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Welcome to IIS-Projects
In this page you will find student and research projects at the Integrated Systems Laboratory of the ETH Zurich.
Institute Organization
The IIS Consists of 4 main research groups
- Analog and Mixed Signal Design
- Digital Circuits and Systems
- Nano Electronics and Nano Photonics
- Nano-TCAD
Analog and Mixed Signal Design Group (Prof. Huang)
- Event-Driven Convolutional Neural Network Modular Accelerator
- Level Crossing ADC For a Many Channels Neural Recording Interface
- Heart Rate Detection Algorithm
- Ultra-low power transceiver for implantable devices
- Design of a 25 Gbps SerDes for optical chip-to-chip communication
- High performance continuous-time Delta-Sigma ADC for magnetic resonance imaging
- Design of Charge-Pump PLL in 28nm for 5G communication applications
- High Performance Digitally-Assisted Time Domain ADC Design for DPLL used in Cellular IOT
- High Power Efficient Digitally Controlled Oscillator Design for Cellular IOT
Digital Circuits and Systems Group (Prof. Benini)
- Computer Architecture
- Acceleration and Transprecision
- Heterogeneous Acceleration Systems
- Event-Driven Computing
- Predictable Execution
- Low Power Embedded Systems and Wireless Sensors Networks
- Embedded Artificial Intelligence:Systems And Applications
- Students' International Competitions: F1(AMZ), Swissloop, Educational Rockets
- Transient Computing
- RF SoCs for the Internet of Things
- Energy Efficient Autonomous UAVs
- Biomedical System on Chips
- Digital Medical Ultrasound Imaging
- Cryptographic Hardware
- Deep Learning Acceleration
- Human Intranet
Nano Electronics and Nano Photonics Group (Prof. Wood)
Please see the dedicated www page for Open Semester and Master Projects at the Laboratory for Nanoelectronics.
Nano-TCAD Group (Prof. Luisier)
- Electrical characterization and optimization of electrochemical random-access memory for analog computing
- Optical Weights for Photonic Neural Networks
- Ab-initio modeling of ballistic thermal transport
Collaborations with other groups/departments
Selected Projects in Progress
For a complete list, see Projects in Progress.
- Investigation of the high-performance multi-threaded OoO IBM A2O Core (1-3S)
- Manycore System on FPGA (M/S/G)
- Physical Implementation of Ara, PULP's Vector Machine (1-2S)
- Transforming MemPool into a CGRA (M)
- Beamspace processing for 5G mmWave massive MIMO on GPU
Selected Completed Projects
For a complete list, see Completed Projects.
- Neural Networks Framwork for Embedded Plattforms
- Stand-Alone Edge Computing with GAP8
- Securing Block Ciphers against SCA and SIFA
- A Flexible Peripheral System for High-Performance Systems on Chip (M)
- ISA extensions in the Snitch Processor for Signal Processing (M)
Selected Research Projects
For a complete list, see Research Projects.
- Neural Networks Framwork for Embedded Plattforms
- Stand-Alone Edge Computing with GAP8
- Securing Block Ciphers against SCA and SIFA
- A Flexible Peripheral System for High-Performance Systems on Chip (M)
- ISA extensions in the Snitch Processor for Signal Processing (M)
Links to Other IIS Webpages
- http://www.iis.ee.ethz.ch
- Integrated Systems Laboratory Main homepage
- http://lne.ee.ethz.ch
- Laboratory for Nanoelectronics homepage
- http://www.nano-tcad.ethz.ch
- Nano-TCAD group homepage
- http://www.dz.ee.ethz.ch
- Microelectronics Design Center
- http://asic.ethz.ch/cg
- The IIS-ASIC Chip Gallery
- http://eda.ee.ethz.ch
- EDA Wiki (ETH Zurich internal access only!)
