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Showing below up to 100 results in range #601 to #700.
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- Minimum Variance Beamforming for Wearable Ultrasound Probes (16:57, 16 September 2022)
- Machine Learning for extracting Muscle features using Ultrasound (16:57, 16 September 2022)
- Compression of Ultrasound data on FPGA (16:57, 16 September 2022)
- LightProbe - 200G Remote DMA for GPU FPGA Data Transfers (16:58, 16 September 2022)
- Time Gain Compensation for Ultrasound Imaging (16:58, 16 September 2022)
- LightProbe - WIFI extension (PCB) (16:59, 16 September 2022)
- Alias-Free Oscillator Synchronization for Arbitrary Waveforms (09:48, 5 October 2022)
- Aliasing-Free Wavetable Music Synthesizer (18:09, 9 October 2022)
- Test project (18:15, 11 October 2022)
- Benchmarking a heterogeneous 217-core MPSoC on HPC applications (11:46, 12 October 2022)
- Benchmarking a heterogeneous 217-core MPSoC on HPC applications (M/1-3S)) (11:48, 12 October 2022)
- SCMI Support for Power Controller Subsystem (13:55, 12 October 2022)
- A Post-Simulation Trace-Based RISC-V GDB Debugging Server (01:02, 13 October 2022)
- Extended Verification for Ara (14:19, 18 October 2022)
- Implementing DSP Instructions in Banshee (1S) (13:31, 27 October 2022)
- Counter-based Fast Power Estimation using FPGAs (M/1-3S) (13:51, 27 October 2022)
- Towards a Technology-independent and Synthesizable AXI4 Performance Monitoring and Throttling Unit (1-2S) (13:58, 27 October 2022)
- Flexfloat DL Training Framework (10:13, 2 November 2022)
- Approximate Matrix Multiplication based Hardware Accelerator to achieve the next 10x in Energy Efficiency: Training Strategy And Algorithmic optimizations (16:32, 3 November 2022)
- Approximate Matrix Multiplication based Hardware Accelerator to achieve the next 10x in Energy Efficiency: Full System Intregration (16:50, 3 November 2022)
- Augmenting Our IPs with AXI Stream Extensions (M/1-2S) (16:13, 6 November 2022)
- Efficient Memory Stream Handling in RISC-V-based Systems (M/1-2S) (16:14, 6 November 2022)
- All the flavours of FFT on MemPool (1-2S/B) (18:54, 9 November 2022)
- Molecular Binding Kinetics Modelling of NO2 on Graphene/hBN Heterostructure (18:47, 10 November 2022)
- Feature Extraction for Speech Recognition (1S) (11:00, 14 November 2022)
- Online Learning of User Features (1S) (11:00, 14 November 2022)
- CLIC for the CVA6 (10:53, 15 November 2022)
- Coherence-Capable Write-Back L1 Data Cache for Ariane (M) (16:32, 15 November 2022)
- Implementation of a Coherent Application-Class Multicore System (1-2S) (16:41, 15 November 2022)
- Design of a Reconfigurable Vector Processor Cluster for Area Efficient Radar Processing (1M) (20:42, 22 November 2022)
- Autonomous Sensing For Trains In The IoT Era (08:36, 23 November 2022)
- Outdoor Precision Object Tracking for Rockfall Experiments (08:37, 23 November 2022)
- Wearables in Fashion (08:38, 23 November 2022)
- Biomedical System on Chips (19:23, 23 November 2022)
- Exploration and Hardware Acceleration of Intra-Layer Mixed-Precision QNNs (22:15, 23 November 2022)
- Stefan Lippuner (10:47, 24 November 2022)
- Modular Frequency-Modulation (FM) Music Synthesizer (12:35, 28 November 2022)
- Versatile HW SW Digital PHY for inter chip communication (20:37, 15 December 2022)
- Analog Compute-in-Memory Accelerator Interface and Integration (18:02, 16 December 2022)
- Novel Metastability Mitigation Technique (18:03, 16 December 2022)
- Precise Ultra-low-power Timer (18:04, 16 December 2022)
- Energy Efficient Circuits and IoT Systems Group (15:19, 19 December 2022)
- Design of MEMs Sensor Interface (15:19, 19 December 2022)
- Hardware/software codesign neural decoding algorithm for “neural dust” (16:16, 9 January 2023)
- Christoph Leitner (01:54, 12 January 2023)
- Bluetooth Low Energy receiver in 65nm CMOS (12:24, 12 January 2023)
- Bridging QuantLab with LPDNN (19:36, 12 January 2023)
- Completed (19:43, 12 January 2023)
- Neural Architecture Search using Reinforcement Learning and Search Space Reduction (12:58, 16 January 2023)
- Accelerating Stencil Workloads on Snitch using ISSRs (1-2S/B) (22:29, 19 January 2023)
- Design of low mismatch DAC used for VAD (17:04, 24 January 2023)
- Mixed-Signal Circuit Design (14:26, 25 January 2023)
- High-Speed Digital-to-Analog Converter (DAC) for massive MIMO testing in 65nm CMOS (14:29, 25 January 2023)
- High-Speed SAR ADC for next generation wireless communication in 12nm FinFET (14:30, 25 January 2023)
- Wearables for Sports and Life Enhancement (14:17, 28 January 2023)
- SmartRing (10:45, 31 January 2023)
- BLISS - Battery-Less Identification System for Security (10:45, 31 January 2023)
- Configurable Ultra Low Power LDO (19:20, 13 February 2023)
- Simulation of 2D artificial cilia metasurface in COMSOL (10:21, 14 February 2023)
- Noise Figure Measurement for Cryogenic System (10:32, 14 February 2023)
- An Ultra-Compact High-Power CMOS Power Amplifier for Millimeter-Wave 5G Communications (10:33, 14 February 2023)
- Design of a D-Band Variable Gain Amplifier for 6G Communication (10:44, 14 February 2023)
- High resolution, low power Sigma Delta ADC (11:29, 14 February 2023)
- Energy Efficient Serial Link (11:44, 14 February 2023)
- Super Resolution Radar/Imaging at mm-Wave frequencies (11:44, 14 February 2023)
- Machine Learning Assisted Direct Synthesis of Passive Networks (11:44, 14 February 2023)
- Template (15:44, 14 February 2023)
- Electrically verifying a CMOS Multi-Modal Electrochemical, Impedance, and Optical Cellular Sensing Array for Massively Paralleled Exoelectrogen Screening (16:46, 17 February 2023)
- Charge and heat transport through graphene nanoribbon based devices (17:28, 20 February 2023)
- Energy Efficient AXI Interface to Serial Link Physical Layer (18:21, 20 February 2023)
- BirdGuard (08:32, 23 February 2023)
- Mixed Signal IC Design (17:27, 1 March 2023)
- Guillaume Mocquard (17:55, 1 March 2023)
- Digital Control of a DC/DC Buck Converter (18:06, 1 March 2023)
- Analog (18:11, 1 March 2023)
- Peripheral Event Linking System for Real-time Capable Energy Efficient SoCs (19:54, 1 March 2023)
- Ternary Neural Networks for Face Recognition (09:54, 8 March 2023)
- Mapping Networks on Reconfigurable Binary Engine Accelerator (09:55, 8 March 2023)
- Design of a Prototype Chip with Interleaved Memory and Network-on-Chip (14:30, 8 March 2023)
- Efficient Banded Matrix Multiplication for Quantum Transport Simulations (15:56, 1 May 2023)
- ASIC Implementation of Jammer Mitigation (13:31, 10 May 2023)
- Novel Methods for Jammer Mitigation (13:32, 10 May 2023)
- Weak-strong massive MIMO communication with low-resolution ADCs (13:33, 10 May 2023)
- Optimizing the Pipeline in our Floating Point Architectures (1S) (14:27, 15 May 2023)
- Artificial Reverberation for Embedded Systems (12:39, 14 June 2023)
- Running Rust on PULP (14:14, 29 June 2023)
- Implementing Configurable Dual-Core Redundancy (14:15, 29 June 2023)
- Michael Rogenmoser (17:30, 3 July 2023)
- Development of statistics and contention monitoring unit for PULP (14:47, 7 July 2023)
- Fast Accelerator Context Switch for PULP (16:27, 7 July 2023)
- Smart Goggles for Visual In-Action Feedback in Ski Jumping (1 B/S) (23:11, 14 July 2023)
- Smart Googles for Visual In-Action Feedback in Ski Jumping (1 B/S) (23:13, 14 July 2023)
- Modular Distributed Data Collection Platform (12:58, 20 July 2023)
- Testbed Design for Self-sustainable IoT Sensors (13:03, 20 July 2023)
- Towards Flexible and Printable Wearables (13:06, 20 July 2023)
- Wireless EEG Acquisition and Processing (15:04, 20 July 2023)
- Continual Learning for Adaptive EEG Monitoring in Epileptic Seizure Detection (15:04, 20 July 2023)
- Adaptively Controlled Polarization And Hysteresis Curve Tracing For Polymer Piezoelectrics (1 S/B) (18:14, 21 July 2023)
- Development Of A Test Bed For Ultrasonic Transducer Characterization (1 S/B) (18:18, 21 July 2023)
- Ultrasound image data recycler (18:19, 21 July 2023)
