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• Full-band simulations of InP/GaAsSb/InP Double Heterojunction Bipolar Transistors (DHBTs)
  ...mulator what happens if the GaAsSb/InP junction contains atomic roughness. In this case, momentum conservation is broken and L-valley electrons might eve : Interest in device modeling
  3 KB (377 words) - 15:44, 4 September 2019
• Design study of tunneling transistors based on a core/shell nanowire structures
  ...could provide better performance than standard ones. The key idea consists in using a core/shell nanowire structure where the core and the shell have dif : Interest in device modeling
  3 KB (357 words) - 15:38, 4 September 2019
• Computation of Phonon Bandstructure in III-V Nanostructures
  [[File:Computation of Phonon Bandstructure in III-V Nanostructures.png|280px|thumb]] ...ld's summation method in bulk structures, it is not clear how to handle it in nanostructures without too much increasing the computational burden.
  3 KB (363 words) - 15:37, 4 September 2019
• Simulation of Negative Capacitance Ferroelectric Transistor
  ...ring ON-OFF switching processes. In FETs, the major difficulty to overcome in order to minimize their power consumption is the value of their inverse sub ===Status: In Progress ===
  3 KB (449 words) - 15:37, 4 September 2019
• Investigation of Redox Processes in CBRAM
  ...a large number of different metal/oxide pairs so that their applicability in CBRAM applications can be validated. ...developed an electrochemical model in COMSOL to simulate ON/OFF switching in CBRAM. So far, the model still depends on a number of free input parameters
  4 KB (488 words) - 17:12, 16 September 2021
• Investigation of Metal Diffusion in Oxides for CBRAM Applications
  ...umber of metal/oxide pairs and analyze them regarding their applicability in CBRAM applications ...group has developed a model in COMSOL to simulate ON/OFF switching in CBRAM. So far, the model depends on a number of free input parameters, amon
  3 KB (448 words) - 17:11, 16 September 2021
• Development of an efficient algorithm for quantum transport codes
  :Good knowledge in solid state physics and quantum mechanics ===Status: In Progress ===
  2 KB (284 words) - 17:10, 16 September 2021
• Integrated silicon photonic structures
  physical effect available in integrated photonics circuits has been a scientific and internship project is placed in the heart of our R&D activities and covers topics related
  4 KB (608 words) - 13:58, 23 June 2021
• Analysis and Design of Power Efficient RF/ mm-Wave LC-tank Oscillator in 28nm for 5G communication applications
  ...ch means the high purity frequency carriers are required to be synthesized in the range from 15 GHz to even 60 GHz. ...lution (PLL), VCO is the key part of the whole frequency solution since it in general consumes 70% to even 80% of the full power budget of a PLL as well
  4 KB (518 words) - 16:07, 6 May 2019
• A Unified-Multiplier Based Hardware Architecture for Elliptic Curve Cryptography
  In addition to the "pseudo-processor-controlled approach", the [[Category:In progress]]
  2 KB (326 words) - 12:26, 26 March 2015
• Hardware Support for IDE in Multicore Environment
  [[File:Hardware support for IDE in multicore.jpg|thumb]] ===Status: In Progress ===
  2 KB (188 words) - 10:58, 27 March 2014
• FPGA-Based Digital Frontend for 3G Receivers
  ...n receiver for 3G mobile communications standard, such as the ones present in any mobile phone, consist of many digital blocks which process the received ...s in the receiver, such as a DC-offset, have to be corrected. This is done in the Digital Frontend (DFE).
  2 KB (348 words) - 20:01, 26 September 2017
• ASIC
  In an ASIC (Application Specific Integrated Circuit) project you will be worki ...nding on the project, your design may be sent for manufacturing to be used in future projects.
  1 KB (165 words) - 19:52, 10 February 2015
• FPGA
  ...prototypes and/or testbeds used to simulate the behavior of large systems. In such a project you will ==Projects in Progress==
  1,020 bytes (132 words) - 19:50, 10 February 2015
• Indoor Positioning with Bluetooth
  : Interest in wireless communications : Knowledge in Matlab, C and/or VHDL is of advantage
  3 KB (449 words) - 12:12, 4 November 2019
• Advanced 5G Repetition Combining
  ...s to a brute-force approach to combining this information. As a first step in your project, you will study ways to reduce the complexity on an algorithmi ===Status: In Progress ===
  3 KB (345 words) - 10:52, 5 April 2022
• OpenRISC SoC for Sensor Applications
  ...cessor design | previous semester thesis]]. We are already using this core in our [[:Category:PULP|multi-core projects]] and we continue to make improvem : SPI is used as a standard interface in many applications, especially in resource limited systems where the number of I/O pins are limited. We alrea
  4 KB (667 words) - 15:23, 23 December 2016
• Hardware Accelerator for Model Predictive Controller
  In the latest years model predictive controller has been successfully applied ...ion enabling the use of model predictive control in a real case scenario. In addition to that thermal evolution of multicore platforms are characterized
  3 KB (456 words) - 08:35, 20 January 2021
• NORX - an AEAD algorithm for the CAESAR competition
  A detailed description of the algorithm can be found in the specification [http://competitions.cr.yp.to/round1/norxv1.pdf PDF]. ===Status: In Progress ===
  3 KB (423 words) - 11:13, 13 June 2014
• Digital Beamforming for Ultrasound Imaging
  ...n body, with both diagnostic and therapeutic applications. IIS is involved in a project developing a high-performance, portable 3D ultrasound platform. ...r elements, it is definitely the computationally most intensive operation. In order to allow for portable 3D ultrasound systems, new algorithms and hardw
  3 KB (423 words) - 11:23, 10 November 2017
• An FPGA-Based Evaluation Platform for Mobile Communications
  In this project you will implement a simulation environment for mobile communi All parts of a wireless receiver have to be carefully optimized in order to
  3 KB (413 words) - 16:05, 21 July 2016
• Real-Time Pedestrian Detection For Privacy Enhancement
  ...n public places are being monitored: real-time surveillance is not allowed in such cases, and stored data can (even for internal use) only be accessed wi : Interest in video processing and machine learning
  3 KB (408 words) - 13:17, 5 February 2016
• Karim Badawi
  == Projects in Progress== category = In progress
  653 bytes (63 words) - 15:06, 5 December 2018
• GSM Voice Capacity Evolution - VAMOS
  ...Evolved EDGE even allows 1 Mobile Station (MS) to use 2 frequency carriers in the downlink. This further provides less time slots available for Voice con ...ections are transmitted simultaneously on the same time slot. This results in 4 simultaneous voice connections if half rate voice codecs are used. The VA
  2 KB (250 words) - 17:45, 14 April 2016
• Design of an LTE Module for the Internet of Things
  ...g low-power and low-cost of IoT components, especially on the client side. In the latest release of the LTE standard, a new user-equipment category (Cat- ...owards Category-0 devices. In a second stage you will implement the design in a hardware description language (HDL) and deploy it to the LTE transceiver
  3 KB (335 words) - 14:20, 4 November 2019
• Design and Implementation of a Convolutional Neural Network Accelerator ASIC
  ...of recognizing and classifying objects in a scene. Many popular algorithms in this area require the evaluations of multiple layers of filter banks. Almos ...n public places are being monitored: real-time surveillance is not allowed in such cases, and stored data can (even for internal use) only be accessed wi
  9 KB (1,289 words) - 19:45, 24 March 2015
• Low-power Clock Generation Solutions for 65nm Technology
  planning a series of [[PULP]] chips in this technology. Depending on the 100 and 800 MHz. In this work, a low power clock generation solution is
  3 KB (466 words) - 19:37, 3 March 2016
• Evaluating the RiscV Architecture
  ...de size etc.) The plan is to manufacture the Risc V based [[PULP]] cluster in UMC 65nm technology, to obtain also measurement results. ===Status: In Progress ===
  3 KB (374 words) - 16:24, 30 October 2020
• Hardware/software co-programming on the Parallella platform
  [[Category:In progress]]
  3 KB (501 words) - 14:26, 2 September 2015
• Gomeza old project4
  ...ency and generality than traditional computer vision techniques. With that in mind, we want to explore their effectiveness on batteryless (e.g. solar-pow ===Status: In Progress ===
  3 KB (480 words) - 19:08, 28 January 2017
• Ultra-High-Efficiency Power Supply Management for Ultra-Low-Power Systems on Chip
  ...portant as a high-efficiency is controllability: lowest energy consumption in VLSI chips requires several dynamically adaptable voltages: # Unused units need to be fully shut down due to the leakage present even in absence of clock and signal transitions.
  3 KB (438 words) - 18:06, 3 February 2015
• Gomeza old project1
  ...geneity has been a common approach to reach this goal in high-end systems. In this project, your main task will be to design and implement an energy-awar ...rallelism, a typical application can be mapped to both cores. This results in a lower active time, allowing the system to enter a low-power sleep mode, a
  3 KB (431 words) - 18:04, 28 January 2017
• Birds Long Term Monitoring With Ultra Low Power Wireless Sensor Node
  ...ess sensors are most commonly used for monitoring, detection of events and in general collecting/processing/sending sensors data (i.e temperature, humidi ...sing of the data could be part of the project as well. The project is done in collaboration with Institute of Neuroinformatics Prof. Richard Hahnloser
  4 KB (589 words) - 10:14, 3 August 2018
• Gomeza old project2
  ...ying capacity. By the end of this project a functional node will be tested in a simulated environment. ===Status: In Progress ===
  3 KB (376 words) - 18:04, 28 January 2017
• Energy Neutral Multi Sensors Wearable Device
  ...mount of easily obtained prior information without resorting to supervised in situ training. ===Status: In Progress ===
  2 KB (319 words) - 16:24, 30 October 2020
• Digital
  ...f the time negotiable with the supervisor. Don't hesitate to show interest in a master thesis topic even though you are e.g. looking for a semester thesi ...our projects categories or added a new project, you need to open this page in edit mode and save it (without changing anything) for the list to get refre
  7 KB (816 words) - 11:57, 8 May 2024
• Acceleration and Transprecision
  ...cient. Such accelerators are not limited to high performance sector alone. In low power computing, they allow complex tasks such as computer vision or cr ===Projects In Progress===
  2 KB (275 words) - 17:05, 24 November 2023
• Telecommunications
  ...telecommunications. Feel free to contact them if you want to do a project in this field. ==Projects in Progress==
  892 bytes (86 words) - 17:42, 24 March 2015
• Ultrafast Medical Ultrasound imaging on a GPU
  In conventional ultrasound imaging each image line is acquired sequentially. S In ultrafast imaging, on the other hand, the entire field of view is acquired
  3 KB (428 words) - 12:13, 1 August 2018
• Philipp Schönle
  ==Projects in Progress== category = In progress
  569 bytes (54 words) - 10:52, 10 March 2015
• Benjamin Sporrer
  ==Projects in Progress== category = In progress
  567 bytes (54 words) - 13:01, 10 March 2015
• Real-Time Optical Flow Using Neural Networks
  ...others work by looking at few well-trackable points (corners, edges, ...) in both images to find correspondences and then solve complex optimization pro ...re computer vision is most interesting: on low-power and mobile platforms, in cars, ...
  5 KB (707 words) - 11:22, 5 February 2016
• PULPonFPGA: Lightweight Virtual Memory Support - Software Cache
  ...re virtual address pointers between the host processor and the accelerator in a completely transparent manner, it still requires the programmer to manual ...TCDM to filter the accelerator's accesses to shared data structures living in main memory, and to spare the programmer from manually setting up the DMA t
  5 KB (716 words) - 13:43, 29 November 2019
• DigitalUltrasoundHead
  ...r a large cable containing hundreds of small coaxial cables. This is shown in the figure below: We plan to replace this analog connection by a digital link as shown in the next figure:
  3 KB (378 words) - 11:52, 10 January 2017
• Audio
  ==Projects in Progress== category = In progress
  403 bytes (36 words) - 17:28, 11 February 2015
• Pascal Hager
  == Projects in Progress== category = In progress
  775 bytes (81 words) - 11:40, 10 November 2017
• Software
  In this category the projects require you to do programming ==Projects in Progress==
  473 bytes (46 words) - 13:45, 8 August 2016
• Vector Processor for In-Memory Computing
  ...ors - and these would have direct access to the DRAM. The concept of such "in-memory computing" ...so far it has not been viable on an industrial scale. Recent developments in process technology combined with industrial efforts to bring them
  3 KB (443 words) - 13:10, 2 November 2015
• Signal to Noise Ratio Estimation for 3G standards
  ...to-noise ratio (SNR) is the basis for almost any digital signal processing in a receiver. ...semester project you will implement an efficient SNR-estimation algorithm in order to obtain an energy and area-efficient solution. This can be done as
  2 KB (300 words) - 11:23, 14 April 2016
• FFT-based Convolutional Network Accelerator
  ...or FPGA accelerator to perform this step faster and more power-efficiently in the frequency domain. * Interest in computer vision, signal processing and VLSI design
  8 KB (1,145 words) - 11:30, 5 February 2016
• High-speed Scene Labeling on FPGA
  ...of recognizing and classifying objects in a scene. Many popular algorithms in this area require the evaluations of multiple layers of filter banks. Almos ...are codesign work is much more applicable in industry and less constrained in terms of memory and interfaces. If desired by the student, also the use of
  8 KB (1,197 words) - 18:18, 29 August 2016
• Michael Muehlberghuber
  ...an the ones listed below. So just drop me an e-mail or come into my office in order to discuss any security- or cryptography-related topics. ===Projects in Progress===
  1 KB (139 words) - 12:39, 7 November 2017
• Cryptography
  ...eld of cryptography. Feel free to contact them if you want to do a project in this field. <!-- ==Projects in Progress==
  645 bytes (67 words) - 21:04, 24 August 2018
• Time Synchronization for 3G Mobile Communications
  ...are around and which synchronization codes are used. Solving this problem in dedicated hardware will be the topic of this thesis. Synchronization in time will detect the position of the frame boundaries and reveal the Cell I
  3 KB (420 words) - 11:22, 14 April 2016
• PULPonFPGA: Lightweight Virtual Memory Support - Coherency Extensions
  ...on to enable lightweight virtual memory support for many-core accelerators in heterogeneous embedded SoCs. Based on a content-addressable memory (CAM), e ...L. Benini, "Lightweight Virtual Memory Support for Many-Core Accelerators in Heterogeneous Embedded SoCs", ''Proceedings of the 10th International Confe
  4 KB (585 words) - 17:57, 7 November 2017
• PULPonFPGA: Lightweight Virtual Memory Support - Multi-Level TLB
  ...on to enable lightweight virtual memory support for many-core accelerators in heterogeneous embedded SoCs. Based on a content-addressable memory (CAM), e ...with a multi-level TLB and lightweight hardware support for TLB management in order to support dynamic self-updating of the TLB without frequent host int
  4 KB (554 words) - 17:57, 7 November 2017
• Autonomous Sensing For Trains In The IoT Era
  ...and railways applications in collaboration with Bombardier that (i) can go in a zero-power but with change status fast when important events are detected
  6 KB (774 words) - 08:36, 23 November 2022
• Switched Capacitor Based Bandgap-Reference
  ...or driven by a posititive to absolute temperature (PTAT) current to result in a temperature independent voltage of about 1.2V. Such a voltage is not comp ...they create an intrinsic voltage ripple that has to be heavily suppressed in the case of a reference.
  4 KB (471 words) - 11:13, 3 May 2018
• Scattering Networks for Scene Labeling
  ...es) were successfully employed in a number of classification tasks [1,3]. In contrast to traditional convolutional neural networks which learn the filt ===Status: {Available, Reserved, In Progress, Completed}===
  4 KB (563 words) - 11:29, 5 February 2016
• Autonomous Smart Watches: Toward an ultra low power microphone detector with events classification
  ...uccess in wearable devices and sensors in several real-world applications. In this project we address the challenges of context recognition on low energy You will investigate the possibility to implement neural network in a ultra low power energy efficient micro-controller (Ambiq Apollo). The mai
  4 KB (507 words) - 12:11, 16 February 2016
• Low Power Neural Network For Multi Sensors Wearable Devices
  ...itoring, and detection of events related to the wearer (e.g. abnormalities in physiological functions, detection of seizures and symptoms, patterns of mo ...rate (e.g. sampling frequency) sufficient for the particular application, in order not to miss the event. However, the rate of occurrence of the event
  7 KB (895 words) - 17:02, 28 July 2017
• GUI-developement for an action-cam-based eye tracking device
  ...ior of novice and expert athletes and the ability to drive in the elderly. In such cases, it is impertinent to record the participants’ behavior under ...t, pause, stop) and all its settings. The live preview should be displayed in the app and a possibility to incorporate a live eye position overlay should
  2 KB (277 words) - 11:10, 3 May 2018
• David J. Mack
  ...ard Karls University in Tübingen, Germany. In 2015, he acquired his Ph.D. in Cognitive and Behavioral Neuroscience at the same university. Since 2015 he If you are interested in eye tracking, biological signal processing or even a neuroscience research
  2 KB (310 words) - 17:41, 31 August 2016
• Improving our Smart Camera System
  ...sify every pixel in an image using convolutional neural networks. However, in the mean time we have developed several new approaches to process the acqui Now we would like to include those in our prototype, and otherwise improve it by building a more compact system,
  8 KB (1,176 words) - 16:26, 30 October 2020
• Implementing Hibernation on the ARM Cortex M0
  ...rocontroller in this environment requires special measurements to be taken in order to avoid restarting the entire task after each power outage. Both scenarios require a mechanism to save a snapshot of the processor state in a non-volatile memory. This mechanism is commonly known as '''hibernation''
  3 KB (390 words) - 11:59, 20 June 2016
• Ultra-Efficient Visual Classification on Movidius Myriad2
  ...lown floating point data that is often unnecessary to achieve good results in trained models. On the other hand, ASICs are often orders of magnitude more ...yriad architecture can provide more than 10 GOPS of processing performance in a power envelope of less than 0.5W. It consists of two general-purpose SPAR
  4 KB (593 words) - 14:57, 30 November 2016
• Efficient Implementation of an Active-Set QP Solver for FPGAs
  Quadratic programming (QP) problems arise in various embedded optimization applications such as model predictive control In this master project you will be working on an efficient FPGA implementation
  4 KB (542 words) - 12:39, 1 June 2017
• FPGA System Design for Computer Vision with Convolutional Neural Networks
  ...of recognizing and classifying objects in a scene. Many popular algorithms in this area require the evaluations of multiple layers of filter banks. Almos ...stem on a FPGA and further improve the accelerator. This is where you come in. We have several aspects which we would like to explore: porting the Origam
  3 KB (397 words) - 18:17, 29 August 2016
• Learning Image Decompression with Convolutional Networks
  In this project, we have developed several ConvNets to remove compression arti ===Status: {Available, Reserved, In Progress, Completed}===
  2 KB (285 words) - 18:16, 29 August 2016
• Covariant Feature Detector on Parallel Ultra Low Power Architecture
  ...ULP) accelerators we are developing the first Computer Vision (CV) library in such domain. ...form designed to operate on a large range of operating voltages, achieving in this way a high level of energy efficiency over a wide range of application
  4 KB (628 words) - 16:16, 20 February 2018
• Gomeza old project3
  ...harvesting applications, sensor nodes are able to store any excess energy in a storage device such as battery or supercapacitor for future use. A correc # Test final design in real-world scenarios
  3 KB (366 words) - 18:04, 28 January 2017
• Bateryless Heart Rate Monitoring
  ...ombination wearable sensors and wireless communication. We are interested in building small wearable, bateryless devices which can perform different dif # Test final design in real-world scenarios.
  3 KB (413 words) - 15:21, 28 January 2016
• Change-based Evaluation of Convolutional Neural Networks
  ...e next (consider a fixed camera and just some people or cars moving around in the scene). This project would look into updating intermediate results only * Interest in computer vision and system engineering
  5 KB (747 words) - 18:04, 29 August 2016
• Rethinking our Convolutional Network Accelerator Architecture
  ...ns such as the synthesis-time fixed filter sizes and room for improvements in terms of energy efficiency. We are looking for your creativity to completel * Interest in VLSI architecture exploration and computer vision
  9 KB (1,263 words) - 18:52, 12 December 2016
• Using Motion Sensors to Support Indoor Localization
  sound, optical, vision, or a combination of them. In the context of low-cost embedded systems, as observed in some previous work [1]. This project abstracts from the specific localizati
  3 KB (426 words) - 11:41, 21 July 2017
• Turbo Equalization for Cellular IoT
  ...ds which is one of the reasons why Turbo equalization is found only seldom in practical receiver implementations today. ...ution can be completely hidden making Turbo equalization a viable solution in practical communication systems.
  3 KB (450 words) - 11:43, 13 November 2018
• PULPonFPGA: Hardware L2 Cache
  ...on to enable lightweight virtual memory support for many-core accelerators in heterogeneous embedded SoCs [1,2]. Recently, we have switched to a new eval ...to be adapted to use the widely adopted AXI4 protocol [6], which has built-in cache control signals that shall be used by your new IP. Besides designing
  5 KB (711 words) - 10:27, 5 November 2019
• NextGenChannelDec
  [[File:channel_decoder_intro.jpg|thumb|400px|Channel Decoder in Today's Communication Systems]] ...TE standard bases for example on Turbo codes, LDPC codes have been adopted in the Wifi standard IEEE802.11n/ac/ax. With that the question arises: What co
  3 KB (402 words) - 15:31, 13 April 2016
• Next Generation Channel Decoder
  [[File:channel_decoder_intro.jpg|thumb|400px|Channel Decoder in Today's Communication Systems]] ...TE standard bases for example on Turbo codes, LDPC codes have been adopted in the WiFi standard IEEE802.11n/ac/ax. With that the question arises: What co
  3 KB (418 words) - 14:01, 13 November 2020
• Implementation of a NB-IoT Positioning System
  ...een satellite and receiver making the location estimation very inaccurate. In indoor environments satellite-based positioning completely fails. Furthermo ...DOA) algorithm the base stations transmit reference signals as illustrated in the figure. The User Equipment (UE) detects the time difference of arrival
  4 KB (555 words) - 16:36, 23 May 2018
• Towards Self Sustainable UAVs
  '''Motivation''' In recent years, the popularity of unmanned aerial vehicles (UAV’s) has soar ...on, it suffers from very large charging times and very short flight times. In this
  3 KB (403 words) - 20:45, 9 August 2016
• PULPonFPGA: Lightweight Virtual Memory Support - Page Table Walker
  ...easily portable to other host CPU architectures, but it cannot be executed in interrupt context which causes substantial scheduling delays and an overall ...orted to a dedicated microcontroller core inside the RAB or be implemented in dedicated hardware. While the first step allows to remove the scheduling de
  5 KB (712 words) - 17:57, 7 November 2017
• PULPonFPGA: Lightweight Virtual Memory Support - Physically Contiguous Memory
  ...nt of the page size of the Linux operating system running on the host CPU. In a student project [4], a second, set-associative IOTLB has been designed wh ...d with the accelerator is placed in this section, requiring a single entry in the first IOTLB only.
  6 KB (866 words) - 13:43, 29 November 2019
• Self-Learning Drones based on Neural Networks
  Neural Nets are achieving record-breaking results in all common machine learning tasks and reached high attention of the machine ...nd made the headline by beating the 2nd best player in the world Lee Sedol in the game Go [1]. A game which were considered to be too complex to be solve
  6 KB (828 words) - 16:26, 20 February 2018
• Ultra Low Power Conversion Circuit For Batteryless Applications
  ...the expensive and obtrusive storage element. One of the biggest challenges in batteryless system design is the cold start phase, where the harvesting cir ...10 uW input power range, they are unable to operate in the nanowatt range. In this project, we want to design a DC-DC converter optimized for very low in
  3 KB (485 words) - 17:46, 10 August 2016
• Gomeza old project5
  ...ave several prototypes of batteryless sensor nodes which we want to deploy in a wide area network. * Integrating a LoRa radio in a batteryless sensor node
  3 KB (360 words) - 18:25, 28 January 2017
• 3D Ultrasound Bubble Tracking
  ...Ultrafast Ultrasound Localization Microscopy (uULM) [http://fultrasound.eu/in-vivo-super-resolution-vascular-imaging link]. This semester/master thesis focuses on the ultrafast tracking of bubbles in 3D.
  2 KB (253 words) - 20:52, 12 November 2020
• Towards The Integration of E-skin into Prosthetic Devices
  ...n) and energy harvesting during the project. The project will be supervise in collaboration with Cosmic Lab, University of Genova (prof. Maurizio Valle / ...lations), measuring power-consumption, and assessing detection performance in lab. conditions
  4 KB (631 words) - 11:39, 21 July 2017
• A Wireless Sensor Network for a Smart Building Monitor and Control
  ...ghting control can be made based on the light intensity and human presence in the monitored area sensed by light sensors and motion sensors. This approac ...e students. Measurements of the system will be performed from the students in order to evaluate power consumption reduction, reliability, functionality a
  4 KB (571 words) - 21:42, 30 July 2018
• A Wireless Sensor Network for HPC monitoring
  The rapid progress of wireless communications and embedded technologies has made wireless sens ...e students. Measurements of the system will be performed from the students in order to evaluate power consumption reduction, reliability, functionality a
  5 KB (617 words) - 16:22, 27 February 2018
• Mauro Salomon
  == Projects in Progress== category = In progress
  637 bytes (60 words) - 10:47, 5 April 2022
• Charging System for Implantable Electronics
  such an extent that its size is small enough to be implantable in rodents for charge the implant's battery while the animal is in its cage from an IR-LED
  3 KB (366 words) - 13:05, 27 April 2018
• Libria
  == Projects in Progress== category = In progress
  646 bytes (68 words) - 09:35, 26 August 2016
• Learning Image Compression with Convolutional Networks
  ...a ConvNet for a different encoding has been done several times before, but in order to optimize for best compression we need to quantize intermediate res In this project you learn the basics of ConvNets, develop such a quantization
  3 KB (362 words) - 16:25, 30 October 2020
• Bringing XNOR-nets (ConvNets) to Silicon
  ...of recognizing and classifying objects in a scene. Many popular algorithms in this area require the evaluations of multiple layers of filter banks. Almos ...it/pixel instead of ~12bit/pixel like before. The current state-of-the-art in this direction are XNOR-nets, but we want to understand them better and use
  10 KB (1,357 words) - 16:25, 30 October 2020
• Signal-Processing and Data-Compression on Beaglebone Black used as embedded HPC-performance-monitoring device
  ...t run-time. Aiming at bridging this gap, we designed and developed at IIS, in collaboration with some Commercial Partners, a scalable and highly accurate [[Category:In progress]]
  3 KB (351 words) - 16:19, 27 February 2018
• Linux Driver for built-in ADC using DMA and Programmable Real-Time Unit (PRU) support on Beaglebone Black used as embedded HPC-performance-monitoring device
  ...t run-time. Aiming at bridging this gap, we designed and developed at IIS, in collaboration with some Commercial Partners, a scalable and highly accurate ...t''' → Implementation and testing of a Linux Device Driver for the built-in Beaglebone Black ADC, using DMA support for the data-copy from the ADC HW-F
  3 KB (394 words) - 16:19, 27 February 2018
• Control an external ADC using Programmable Real-Time Unit (PRU) Subsystem on Beaglebone Black used as embedded HPC-performance-monitoring device
  ...t run-time. Aiming at bridging this gap, we designed and developed at IIS, in collaboration with some Commercial Partners, a scalable and highly accurate ...te a high-speed high-resolution ADC, which will be controlled by the built-in Programmable Real-Time Unit ([http://beagleboard.org/pru PRU]) of the Beagl
  3 KB (440 words) - 16:15, 1 September 2017
• Open Power-On Chip Controller Study and Integration
  In recent years, energy-efficiency is becoming a key challenge in the High Performance Computing (HPC) domain. Until today Intel-based comput ...aracterizing its behavioral (B) and implementing an extension of the built-in power management policy (C) which links run-time architectural information,
  3 KB (462 words) - 15:57, 9 September 2016
• Linux Driver for fine-grain and low overhead access to on-chip performance counters
  In recent years, energy-efficiency is becoming a key challenge in the High Performance Computing (HPC) domain. Indeed, while the demand for m ...experience with Linux Kernel Programming, IIO Linux Subsystem (widely used in Linux-Based SoCs for handling ADCs) and architectural performance counters.
  3 KB (417 words) - 15:55, 9 September 2016

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