Difference between revisions of "User:Prasadar"
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* Machine Learning, Neural Networks | * Machine Learning, Neural Networks | ||
* FPGA & Digital ASIC Design | * FPGA & Digital ASIC Design | ||
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==Contact Information== | ==Contact Information== | ||
Revision as of 15:46, 27 September 2023
Contents
Arpan Suravi Prasad
I received my M.Sc. degree in Electrical Engineering and Information Technology from the Swiss Federal Institute of Technology Zurich (ETHZ), Switzerland in March 2021. After that, I started as a Ph.D. Student in the Digital Circuits and Systems Group of Prof. Dr. L. Benini.
Interests
My research is focused on hardware accelerator designs for Machine Learning applications.
- Machine Learning, Neural Networks
- FPGA & Digital ASIC Design
- Hardware for edge AR/VR devices
Contact Information
- Office: ETZ J89
- telephone: (+41 44 63) 244 91
- e-mail: prasadar@iis.ee.ethz.ch
- www: Arpan Suravi Prasad (ETH page)
Available Projects
- Modeling FlooNoC in GVSoC (S/M)
- Realtime Gaze Tracking on Siracusa
- System Emulation for AR and VR devices
Projects in Progress
No pages meet these criteria.
