User contributions
From iis-projects
- 17:19, 24 March 2015 diff hist +28 N File:RazorEDGE.png RazorEDGE ASIC with testbed. current
- 10:52, 24 March 2015 diff hist +42 N Channel Shortening ASIC Weberbe moved page Channel Shortening ASIC to Channel Shortening Prefilter current
- 10:52, 24 March 2015 diff hist 0 m Channel Shortening Prefilter Weberbe moved page Channel Shortening ASIC to Channel Shortening Prefilter
- 10:42, 24 March 2015 diff hist +995 Channel Shortening Prefilter
- 10:24, 24 March 2015 diff hist +120 N File:ChannelShortening.png A channel shortening prefilter concentrates the energy of the channel impulse response (CIR) towards the first few taps. current
- 18:51, 23 March 2015 diff hist -797 Channel Shortening Prefilter
- 18:48, 23 March 2015 diff hist +1,787 N Channel Shortening Prefilter Created page with "!--thumb|230px---> ==Short Description== In mobile communications, such as in the latest 3G standards, mobile phones usually operate in unfavorable enviro..."
- 17:32, 23 March 2015 diff hist +21 An FPGA-Based Testbed for 3G Mobile Communications Receivers
- 17:10, 18 March 2015 diff hist +69 N Digital Front End Design for Narrowband LTE Systems Weberbe moved page Digital Front End Design for Narrowband LTE Systems to Time and Frequency Synchronization in LTE Cat-0 Devices current
- 17:10, 18 March 2015 diff hist 0 m Time and Frequency Synchronization in LTE Cat-0 Devices Weberbe moved page Digital Front End Design for Narrowband LTE Systems to Time and Frequency Synchronization in LTE Cat-0 Devices
- 10:31, 18 March 2015 diff hist 0 Time and Frequency Synchronization in LTE Cat-0 Devices →Status: Completed
- 10:52, 17 March 2015 diff hist +106 N Design and VLSI Implementation of a Constrained-Viterbi Algorithm for 3GPP TD-HSPA Weberbe moved page Design and VLSI Implementation of a Constrained-Viterbi Algorithm for 3GPP TD-HSPA to Design and VLSI Implementation of a Constrained-Viterbi Algorithm Equalizer for 3GPP TD-HSPA: real title current
- 10:52, 17 March 2015 diff hist 0 m Design and VLSI Implementation of a Constrained-Viterbi Algorithm Equalizer for 3GPP TD-HSPA Weberbe moved page Design and VLSI Implementation of a Constrained-Viterbi Algorithm for 3GPP TD-HSPA to Design and VLSI Implementation of a Constrained-Viterbi Algorithm Equalizer for 3GPP TD-HSPA: real title
- 10:50, 17 March 2015 diff hist +93 Design and VLSI Implementation of a Constrained-Viterbi Algorithm Equalizer for 3GPP TD-HSPA
- 10:43, 17 March 2015 diff hist +26 Time and Frequency Synchronization in LTE Cat-0 Devices
- 13:04, 10 March 2015 diff hist +22 Receiver design for the DigRF 4G high speed serial link
- 13:03, 10 March 2015 diff hist +22 LTE-Advanced RF Front-end Design in 28nm CMOS Technology
- 13:03, 10 March 2015 diff hist +30 N Category:Sporrerb Redirected page to Benjamin Sporrer current
- 13:02, 10 March 2015 diff hist +21 High Performance Cellular Receivers in Very Advanced CMOS current
- 13:01, 10 March 2015 diff hist +567 N Benjamin Sporrer Created page with "==Available Projects== <DynamicPageList> supresserrors = true category = Available category = Sporrerb </DynamicPageList> ==Projects in Progress== <DynamicPageList> supresserr..." current
- 12:58, 10 March 2015 diff hist +30 N User:Sporrerb Redirected page to Benjamin Sporrer current
- 12:53, 10 March 2015 diff hist +20 Harald Kröll
- 12:52, 10 March 2015 diff hist +20 Karim Badawi
- 10:55, 10 March 2015 diff hist +23 Android Software Design
- 10:55, 10 March 2015 diff hist +30 N Category:Schoenle Redirected page to Philipp Schönle current
- 10:54, 10 March 2015 diff hist +1 Wireless Biomedical Signal Acquisition Device current
- 10:54, 10 March 2015 diff hist -1 Wireless Biomedical Signal Acquisition Device
- 10:53, 10 March 2015 diff hist +22 Wireless Biomedical Signal Acquisition Device
- 10:53, 10 March 2015 diff hist +22 Flexible Front-End Circuit for Biomedical Data Acquisition current
- 10:52, 10 March 2015 diff hist +569 N Philipp Schönle Created page with "==Available Projects== <DynamicPageList> supresserrors = true category = Available category = Schoenle </DynamicPageList> ==Projects in Progress== <DynamicPageList> supresserr..." current
- 10:49, 10 March 2015 diff hist +30 N User:Schoenle Redirected page to Philipp Schönle current
- 10:38, 10 March 2015 diff hist +607 Benjamin Weber
- 13:39, 3 March 2015 diff hist -94 Design and VLSI Implementation of a Constrained-Viterbi Algorithm Equalizer for 3GPP TD-HSPA
- 13:38, 3 March 2015 diff hist -1,022 4th Generation Synchronization
- 13:37, 3 March 2015 diff hist -1,021 Baseband Meets CPU
- 13:36, 3 March 2015 diff hist -1,020 Time and Frequency Synchronization in LTE Cat-0 Devices
- 13:36, 3 March 2015 diff hist -1,022 Synchronisation and Cyclic Prefix Handling For LTE Testbed
- 13:35, 3 March 2015 diff hist +67 N File:LEG-CVA-detector.png A high level block diagram of a receiver with the LEG-CVA detector. current
- 13:32, 3 March 2015 diff hist +96 N First ASIC Realization For A New HSPA/HSPA+ Detector Weberbe moved page First ASIC Realization For A New HSPA/HSPA+ Detector to Design and VLSI Implementation of a Constrained-Viterbi Algorithm for 3GPP TD-HSPA: changed project name current
- 13:32, 3 March 2015 diff hist 0 m Design and VLSI Implementation of a Constrained-Viterbi Algorithm Equalizer for 3GPP TD-HSPA Weberbe moved page First ASIC Realization For A New HSPA/HSPA+ Detector to Design and VLSI Implementation of a Constrained-Viterbi Algorithm for 3GPP TD-HSPA: changed project name
- 13:31, 3 March 2015 diff hist +1,737 Design and VLSI Implementation of a Constrained-Viterbi Algorithm Equalizer for 3GPP TD-HSPA
- 18:57, 20 February 2015 diff hist +97 N File:TinyIot.png Small footprint and low power nodes are indispensable for the billion devices Internet-of-Things. current
- 18:56, 20 February 2015 diff hist +2,669 N Synchronisation and Cyclic Prefix Handling For LTE Testbed Created page with "thumb|Small footprint and low power nodes are indispensable for the billion devices Internet-of-Things. ==Introduction== By the end of the decade billion..."
- 16:23, 18 February 2015 diff hist -452 Category:Research Redirected page to Research current
- 16:23, 18 February 2015 diff hist +685 N Research Created page with "Research projects at the Integrated Systems Laboratory (IIS). ==2015== <DynamicPageList> suppresserrors = true category = 2015 category = Research </DynamicPageList> ==2014== ..."
- 16:20, 18 February 2015 diff hist -1 Benjamin Weber
- 13:56, 18 February 2015 diff hist -1 Norbert Felber current
- 10:25, 18 February 2015 diff hist +8 Baseband Meets CPU
- 10:14, 18 February 2015 diff hist 0 Baseband Meets CPU →Project Description
- 10:10, 18 February 2015 diff hist +4 Baseband Meets CPU →Project Description