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From iis-projects
- ...ion should also serve as evaluation platform for a later mixed-signal ASIC design. : Some experience in circuit design with discrete active and passive components.3 KB (438 words) - 18:06, 3 February 2015
- ...'' for polarization and testing of piezoelectric polymers. It also aims to design the digital architecture in such a way that later studies will allow '''ML- : Analog Mixed Signal Design6 KB (741 words) - 18:14, 21 July 2023
- : Analog Mixed Signal Design : PCB Design5 KB (644 words) - 18:18, 21 July 2023
- ...ver module running on the host, our solution features a considerably lower design complexity compared to conventional input/output memory management units (I : ... Implement the selected design in hardware by extending the current design.4 KB (554 words) - 17:57, 7 November 2017
- ...ver module running on the host, our solution features a considerably lower design complexity compared to conventional input/output memory management units (I This system design project requires work to be done at several layers of abstraction. More pre4 KB (585 words) - 17:57, 7 November 2017
- ...ly monitoring the sensor signal. Circuit usually operates in the analog or mixed signal domain, and provides a coarse recognition of some pattern related to ...ise etc.) MEMS microphone is used as an signal input. Prototype implements analog-domain spectral decomposition using multiple band-pass filtering banks. Fre7 KB (895 words) - 17:02, 28 July 2017
- This requires the design of an analog/mixed-signal board that generates non-overlapping clocks with programmable amplit ...osts the nanoelectrode array biochips. Starting from an existing tentative design, the project will consist in performing the PCB layout and assessing its pe5 KB (620 words) - 07:56, 26 May 2020
- * Showing participation in non-curricular analog/digital projects is a plus. * Circuit design tools (e.g., Altium Designer).7 KB (903 words) - 10:04, 24 July 2023
- ...ny-core accelerators into embedded heterogeneous SoCs. We have developed a mixed hardware/software solution to enable lightweight virtual memory support for ...mplementation on the Xilinx Virtex-7 FPGA but if desired, an ASIC back-end design can also be implemented.5 KB (711 words) - 10:27, 5 November 2019
- * Propose novel low power mixed analog-digital systems for biomedical signal (in particular EEG but suitable also * '''[[Design Review]]'''6 KB (815 words) - 20:02, 10 March 2024
- ...ny-core accelerators into embedded heterogeneous SoCs. We have developed a mixed hardware/software solution to enable lightweight virtual memory support for : 20% VHDL/System Verilog, FPGA Design5 KB (712 words) - 17:57, 7 November 2017
- ...ny-core accelerators into embedded heterogeneous SoCs. We have developed a mixed hardware/software solution to enable lightweight virtual memory support for : ... Design and implement your own software cache suitable for the heterogeneous platfo5 KB (716 words) - 13:43, 29 November 2019
- : a mixed hardware/software solution enabling lightweight, shared virtual memory (SVM : 50% Design and Implementation (SystemVerilog, C, FPGA/ASIC Design)6 KB (796 words) - 17:19, 18 November 2019
- : a mixed hardware/software solution enabling lightweight, shared virtual memory (SVM : 50% Implementation (C, VHDL, FPGA/ASIC Design)6 KB (801 words) - 15:05, 23 August 2018
- : a mixed hardware/software solution enabling lightweight, shared virtual memory (SVM : 50% Implementation (VHDL, FPGA/ASIC Design, C)6 KB (805 words) - 12:17, 22 January 2018
- ...the ADCs into a single mixed-signal chip [4] that takes the down-converted analog signals from the antennas and produces the symbol estimates, necessitates i ...iu, "Angular-Domain Massive MIMO Detection: Algorithm, Implementation, and Design Tradeoffs," in IEEE Transactions on Circuits and Systems I: Regular Papers,6 KB (843 words) - 17:16, 26 September 2023
- ...ny-core accelerators into embedded heterogeneous SoCs. We have developed a mixed hardware/software solution to enable lightweight virtual memory support for [[Category:System Design]]6 KB (866 words) - 13:43, 29 November 2019
- Many research topics are actively ongoing around the human body, from chip design, to system development, to algorithmic investigations in various applicatio ...gy storage units, transistors, and complete integrated circuits (ICs). The design of these systems allows for comfortable wear, as they can be positioned clo9 KB (1,292 words) - 19:16, 23 March 2024
- ...io, high-level simulators play an essential role in breaking the speed and design effort bottlenecks of cycle-accurate simulators and FPGA prototypes, respec ...show that GVSoC enables practical functional and performance analysis and design exploration at the full-platform level (processors, memory, peripherals and14 KB (2,018 words) - 22:54, 23 November 2023