Pages with the most revisions
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Showing below up to 50 results in range #251 to #300.
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- HERO: TLB Invalidation (9 revisions)
- Energy Efficient SoCs (9 revisions)
- Improved State Estimation on PULP-based Nano-UAVs (9 revisions)
- Design of a 25 Gbps SerDes for optical chip-to-chip communication (9 revisions)
- Real-Time Pedestrian Detection For Privacy Enhancement (9 revisions)
- Low-Energy Cluster-Coupled Vector Coprocessor for Special-Purpose PULP Acceleration (9 revisions)
- Time and Frequency Synchronization in LTE Cat-0 Devices (9 revisions)
- Efficient Implementation of an Active-Set QP Solver for FPGAs (9 revisions)
- Minimal Cost RISC-V core (9 revisions)
- DC-DC Buck converter in 65nm CMOS (9 revisions)
- Real-time eye movement analysis on a tablet computer (9 revisions)
- Karim Badawi (9 revisions)
- Investigation of Metal Diffusion in Oxides for CBRAM Applications (8 revisions)
- Sandro Belfanti (8 revisions)
- Analog Compute-in-Memory Accelerator Interface and Integration (8 revisions)
- A Unified Compute Kernel Library for Snitch (1-2S) (8 revisions)
- SCMI Support for Power Controller Subsystem (8 revisions)
- Autonomous Smart Watches: Toward an ultra low power microphone detector with events classification (8 revisions)
- EvalEDGE: A 2G Cellular Transceiver FMC (8 revisions)
- A Trustworthy Three-Factor Authentication System (8 revisions)
- Audio Video Preprocessing In Parallel Ultra Low Power Platform (8 revisions)
- Linux Driver for fine-grain and low overhead access to on-chip performance counters (8 revisions)
- Fast Wakeup From Deep Sleep State (8 revisions)
- Manycore System on FPGA (M/S/G) (8 revisions)
- Implementation of a Cache Reliability Mechanism (1S/M) (8 revisions)
- Machine Learning on Ultrasound Images (8 revisions)
- Evaluating the RiscV Architecture (8 revisions)
- Resource Partitioning of RPC DRAM (8 revisions)
- Hypervisor Extension for Ariane (M) (8 revisions)
- Resource-Constrained Few-Shot Learning for Keyword Spotting (1S) (8 revisions)
- Energy-Efficient Edge-Pursuit comparator for ultra-low power ADC (8 revisions)
- NVDLA meets PULP (8 revisions)
- Evaluating SoA Post-Training Quantization Algorithms (8 revisions)
- Object Detection and Tracking on the Edge (8 revisions)
- Learning at the Edge with Hardware-Aware Algorithms (8 revisions)
- Physical Implementation of ITA (2S) (8 revisions)
- Implementing Hibernation on the ARM Cortex M0 (8 revisions)
- Deep Convolutional Autoencoder for iEEG Signals (8 revisions)
- Ternary Weights Engine For Efficient Many Channels Spike Sorting Applications (8 revisions)
- Modular Distributed Data Collection Platform (8 revisions)
- Development of a fingertip blood pressure sensor (8 revisions)
- Pirmin Vogel (8 revisions)
- Multi issue OoO Ariane Backend (M) (8 revisions)
- Peripheral Event Linking System for Real-time Capable Energy Efficient SoCs (8 revisions)
- Investigation of the high-performance multi-threaded OoO IBM A2O Core (1-3S) (8 revisions)
- An FPGA-Based Evaluation Platform for Mobile Communications (8 revisions)
- PREM Runtime Scheduling Policies (8 revisions)
- Weekly Reports (8 revisions)
- A computational memory unit using phase-change memory devices (8 revisions)
- PULPonFPGA: Lightweight Virtual Memory Support - Page Table Walker (8 revisions)
