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Showing below up to 50 results in range #501 to #550.
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- Multi-Modal Environmental Sensing With GAP9 (1-2S) (5 revisions)
- Predictable Execution on GPU Caches (5 revisions)
- Indoor Smart Tracking of Hospital instrumentation (5 revisions)
- Final Presentation (5 revisions)
- Hardware/software codesign neural decoding algorithm for “neural dust” (5 revisions)
- Energy-efficient Circuits for Fully Wireless Brain-machine Interfaces (5 revisions)
- Internet of Things SoC Characterization (5 revisions)
- An Ultra-Compact High-Power CMOS Power Amplifier for Millimeter-Wave 5G Communications (5 revisions)
- Low-power Clock Generation Solutions for 65nm Technology (5 revisions)
- Toward Superposition of Brain-Computer Interface Models (5 revisions)
- Low-Complexity MIMO Detection (5 revisions)
- Exploring feature selection and classification algorithms for ultra-low-power closed-loop systems for epilepsy control (5 revisions)
- Pressure and acoustic Smart Sensors Network for Wind Turbines Monitoring (5 revisions)
- Control an external ADC using Programmable Real-Time Unit (PRU) Subsystem on Beaglebone Black used as embedded HPC-performance-monitoring device (5 revisions)
- Design and Implementation of ultra low power vision system (5 revisions)
- Smart Googles for Visual In-Action Feedback in Ski Jumping (1 B/S) (5 revisions)
- State-Saving @ NXP (5 revisions)
- IP-Based SoC Generation and Configuration (1-3S/B) (5 revisions)
- Ultra-low power transceiver for implantable devices (5 revisions)
- Toward hyperdimensional active perception: learning compressed sensorimotor control by demonstration (5 revisions)
- Noise Figure Measurement for Cryogenic System (5 revisions)
- Resource Partitioning of Caches (5 revisions)
- Software-Defined Paging in the Snitch Cluster (2-3S) (5 revisions)
- Data Augmentation Techniques in Biosignal Classification (5 revisions)
- LLVM and DaCe for Snitch (1-2S) (5 revisions)
- High-Throughput Authenticated Encryption Architectures based on Block Ciphers (5 revisions)
- Embedded Systems and autonomous UAVs (5 revisions)
- Open Power-On Chip Controller Study and Integration (5 revisions)
- An FPGA-Based Testbed for 3G Mobile Communications Receivers (4 revisions)
- A Waypoint-based Navigation System for Nano-Size UAVs in GPS-denied Environments (4 revisions)
- Evaluating An Ultra low Power Vision Node (4 revisions)
- Jammer-Resilient Synchronization for Wireless Communications (4 revisions)
- Real-Time Motor-Imagery Classification Using Neuromorphic Processor (4 revisions)
- A Wearable Wireless Kidney Function Monitoring System For BioMedical Applications (4 revisions)
- FPGA-based Implementation of a Novel Cell-Search Algorithm for Mobile Communications (4 revisions)
- Power Optimization in Multipliers (4 revisions)
- A Snitch-Based SoC on iCE40 FPGAs (1-2S/B) (4 revisions)
- NAND Flash Open Research Platform (4 revisions)
- Wireless Biomedical Signal Acquisition Device (4 revisions)
- Intelligent Power Management Unit (iPMU) (4 revisions)
- Reconfigurable Fully-Unrolled 2D-FFT Core Generator for Multi-Antenna mmWave Communication (4 revisions)
- IP-Based SoC Generation and Configuration (1-3S) (4 revisions)
- DigitalUltrasoundHead (4 revisions)
- Super Resolution Radar/Imaging at mm-Wave frequencies (4 revisions)
- In-ear EEG signal acquisition (4 revisions)
- AMZ Driverless Competition Embedded Systems Projects (4 revisions)
- Low Power Neural Network For Multi Sensors Wearable Devices (4 revisions)
- High performance continous-time Delta-Sigma ADC for biomedical applications (4 revisions)
- Mixed-Precision Neural Networks for Brain-Computer Interface Applications (4 revisions)
- Influence of the Initial FilamentGeometry on the Forming Step in CBRAM (4 revisions)
