Design of Streaming Data Platform for High-Speed ADC Data
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Contents
Description
Are you interested in working on cutting-edge technology that involves handling large volumes of high-speed data? We have an exciting opportunity for a motivated student to take on a challenging project in the field of data acquisition and storage.
Project Overview
We have a setup with 32 channels, each outputting data from a 16-bit ADC. These ADCs operate at a data rate of 640 KHz, resulting in a total data rate of 320 Mbps. Our goal is to record this data for an extended period. We are looking for a student to design a streaming data platform capable of writing data directly from the ADC to a storage device (such as a hard drive or SSD), bypassing the need for intermediate storage in RAM. This platform should efficiently handle the high data rate and ensure uninterrupted recording over an extended duration.
Key Tasks
1. Research and understand the specifications of the ADCs, including their data rate and output format.
2. Design an interface between the ADCs and the storage device, considering factors such as data transfer protocols and compatibility, with FPGA or other suitable platforms.
3. Develop a streaming data processing algorithm that can manage the continuous flow of data from the ADCs to the storage device.
4. Optimize the platform for efficiency, minimizing resource utilization and maximizing data throughput.
Expected Deliverables
1. Functional streaming data platform capable of recording data from 32 channels of 16-bit ADCs at a combined data rate of 320 Mbps.
2. Documentation detailing the design, implementation, and testing process.
3. Presentation of the project outcomes and potential areas for further improvement.
Prerequisites
1. Strong background in digital signal processing, data acquisition, and storage systems. 2. Proficiency in programming languages suitable for embedded systems and data processing (e.g., C++, Python). 3. Familiarity with hardware interfaces and protocols (e.g., SPI, I2C, SATA). 4. Experience with high-speed data acquisition systems and ADCs is a plus.
Status: Available
Looking for bachelor/master student who is interseted in doing semester/thesis project. If you are interested in this challenging position, please send your most recent curriculum vitae including a transcript of grades by email to:
Yiyang Chen <yiychen@iis.ee.ethz.ch>
Character
- 20% Literature review
- 20% Theory
- 60% Programming
Professor
Prof. Taekwang Jang <tjang@ethz.ch>
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