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- 14:53, 11 October 2023 (diff | hist) . . (0) . . Optimal routing for 2D Mesh-based Analog Compute-In-Memory Accelerator Architecture (IBM-Zurich) (current)
- 14:53, 11 October 2023 (diff | hist) . . (0) . . Optimal routing for 2D Mesh-based Analog Compute-In-Memory Accelerator Architecture (IBM-Zurich) (→Status: Available)
- 10:31, 28 August 2023 (diff | hist) . . (0) . . m Optimal routing for 2D Mesh-based Analog Compute-In-Memory Accelerator Architecture (IBM-Zurich) (Liaoj moved page Optimal routing for 2D Mesh-based Analog Compute-In-Memory Accelerator Architecture to Optimal routing for 2D Mesh-based Analog Compute-In-Memory Accelerator Architecture (IBM-Zurich))
- 10:31, 28 August 2023 (diff | hist) . . (+110) . . N Optimal routing for 2D Mesh-based Analog Compute-In-Memory Accelerator Architecture (Liaoj moved page Optimal routing for 2D Mesh-based Analog Compute-In-Memory Accelerator Architecture to Optimal routing for 2D Mesh-based Analog Compute-In-Memory Accelerator Architecture (IBM-Zurich)) (current)
- 12:15, 29 July 2023 (diff | hist) . . (+1) . . Optimal routing for 2D Mesh-based Analog Compute-In-Memory Accelerator Architecture (IBM-Zurich)
- 12:15, 29 July 2023 (diff | hist) . . (+49) . . Optimal routing for 2D Mesh-based Analog Compute-In-Memory Accelerator Architecture (IBM-Zurich)
- 12:14, 29 July 2023 (diff | hist) . . (0) . . N File:Optimal routing for ACiM.png (current)
- 12:13, 29 July 2023 (diff | hist) . . (+2,559) . . N Optimal routing for 2D Mesh-based Analog Compute-In-Memory Accelerator Architecture (IBM-Zurich) (Created page with " === Description === The explosive application of deep neural networks to every conceivable domain has led to a consequent interest in acceleration architectures for performin...")
- 16:16, 9 January 2023 (diff | hist) . . (+565) . . Hardware/software codesign neural decoding algorithm for “neural dust” (→Reference) (current)
- 16:15, 9 January 2023 (diff | hist) . . (+565) . . Spiking Neural Network for Motor Function Decoding Based on Neural Dust (→Reference)
- 18:04, 16 December 2022 (diff | hist) . . (0) . . Precise Ultra-low-power Timer (current)
- 18:03, 16 December 2022 (diff | hist) . . (-2) . . Novel Metastability Mitigation Technique (current)
- 18:02, 16 December 2022 (diff | hist) . . (-31) . . Analog Compute-in-Memory Accelerator Interface and Integration (current)
- 15:22, 10 March 2022 (diff | hist) . . (-23) . . Design of MEMs Sensor Interface
- 11:11, 21 February 2022 (diff | hist) . . (+10) . . Novel Metastability Mitigation Technique
- 11:10, 21 February 2022 (diff | hist) . . (-6) . . Novel Metastability Mitigation Technique
- 11:06, 21 February 2022 (diff | hist) . . (-1) . . Energy Efficient Circuits and IoT Systems Group (→Active Projects)
- 11:06, 21 February 2022 (diff | hist) . . (0) . . Low-power Temperature-insensitive Timer (current)
- 11:06, 21 February 2022 (diff | hist) . . (0) . . Low-power Temperature-insensitive Timer
- 14:12, 6 December 2021 (diff | hist) . . (+7) . . Analog Compute-in-Memory Accelerator Interface and Integration
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