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Showing below up to 20 results in range #21 to #40.
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- A FPGA-based data streaming system that enables real-time monitoring of cell culture and neuroactivities
- A Flexible FPGA-Based Peripheral Platform Extending Linux-Capable Systems on Chip (1-3S/B)
- A Flexible Peripheral System for High-Performance Systems on Chip (M)
- A Multiview Synthesis Core in 65 nm CMOS
- A Novel Constrained-Viterbi Algorithm with Linear Equalization and Grouping Assistance
- A Novel Execution Scheme for Ultra-tiny CNNs Aboard Nano-UAVs
- A Post-Simulation Trace-Based RISC-V GDB Debugging Server
- A RISC-V ISA Extension for Pseudo Dual-Issue Monte Carlo in Snitch (1M/2S)
- A RISC-V ISA Extension for Scalar Chaining in Snitch (M)
- A RISC-V fault-tolerant many-core accelerator for 5G Non-Terrestrial Networks (1-2S/B)
- A Recurrent Neural Network Speech Recognition Chip
- A Snitch-Based SoC on iCE40 FPGAs (1-2S/B)
- A Snitch-based Compute Accelerator for HERO
- A Snitch-based Compute Accelerator for HERO (M/1-2S)
- A Trustworthy Three-Factor Authentication System
- A Unified-Multiplier Based Hardware Architecture for Elliptic Curve Cryptography
- A Unified Compute Kernel Library for Snitch (1-2S)
- A Waypoint-based Navigation System for Nano-Size UAVs in GPS-denied Environments
- A Wearable System To Control Phone And Electronic Device Without Hands
- A Wearable System for long term monitoring of human physiological parameters with E skin sensors
