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[[File:Arpan_Suravi_Prasad.jpeg|thumb|250px]]
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== Arpan Suravi Prasad ==
 
I received my M.Sc. degree in Electrical Engineering and Information Technology from the Swiss Federal Institute of Technology Zurich (ETHZ), Switzerland in March 2021. After that, I started as a Ph.D. Student in the Digital Circuits and Systems Group of Prof. Dr. L. Benini.
 
I received my M.Sc. degree in Electrical Engineering and Information Technology from the Swiss Federal Institute of Technology Zurich (ETHZ), Switzerland in March 2021. After that, I started as a Ph.D. Student in the Digital Circuits and Systems Group of Prof. Dr. L. Benini.
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==Interests==
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My research is focused on hardware accelerator designs for Machine Learning applications.
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* Machine Learning, Neural Networks
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* FPGA & Digital ASIC Design
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==Contact Information==
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* '''Office''': ETZ J89
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* '''telephone''': (+41 44 63) 244 91
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* '''e-mail''': [mailto:prasadar@iis.ee.ethz.ch prasadar@iis.ee.ethz.ch]
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* '''www''': [https://iis.ee.ethz.ch/people/person-detail.MjUzMTc0.TGlzdC8zOTg3LDk5MDE4ODk4MA==.html Arpan Suravi Prasad (ETH page)]
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==Available Projects==
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<DynamicPageList>
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supresserrors = true
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category = Available
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category = Prasadar
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</DynamicPageList>
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[[Category: Supervisors]]
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[[Category: Digital]]
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[[Category: Deep Learning Acceleration]]
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[[Category: Hardware Acceleration]]

Revision as of 14:29, 31 January 2022

Arpan Suravi Prasad.jpeg

Arpan Suravi Prasad

I received my M.Sc. degree in Electrical Engineering and Information Technology from the Swiss Federal Institute of Technology Zurich (ETHZ), Switzerland in March 2021. After that, I started as a Ph.D. Student in the Digital Circuits and Systems Group of Prof. Dr. L. Benini.

Interests

My research is focused on hardware accelerator designs for Machine Learning applications.

  • Machine Learning, Neural Networks
  • FPGA & Digital ASIC Design

Contact Information

Available Projects