Pages with the most categories
From iis-projects
Showing below up to 50 results in range #121 to #170.
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- Wireless Communication Systems for the IoT (10 categories)
- Design of a CAN Interface to Enable Reliable Sensors-to-Processors Communication for Automotive-oriented Embedded Applications (1M) (10 categories)
- ASR-Waveformer (10 categories)
- Accelerator for Spatio-Temporal Video Filtering (10 categories)
- BirdGuard (10 categories)
- Implementation of the RISC-V Bit Manipulation (RVB) extensions for our RISC-V core (10 categories)
- Design of an Energy-Efficient Ethernet Interface for Linux-capable Systems (10 categories)
- Air Quality Prediction in Office Rooms (1-2S/M) (10 categories)
- Fast Simulation of Manycore Systems (1S) (10 categories)
- Efficient TNN Inference on PULP Systems (10 categories)
- Ottocore: A Minimal RISC-V Core Designed for Teaching (B/2G) (10 categories)
- Heroino: Design of the next CORE-V Microcontroller (10 categories)
- Integrating Ultrasound Technology into a Fitness Tracking Device (1M, 2 B/S) (10 categories)
- Augmenting Our IPs with AXI Stream Extensions (M/1-2S) (10 categories)
- Smart Agriculture System (1-2S) (10 categories)
- Next Generation Synchronization Signals (10 categories)
- Improving datarate and efficiency of ultra low power wearable ultrasound (10 categories)
- StoneEDGE: An EC-GSM-IoT and Evolved EDGE PHY ASIC (10 categories)
- LightProbe - 200G Remote DMA for GPU FPGA Data Transfers (10 categories)
- Ultrasound Low power WiFi with IMX7 (10 categories)
- GUI-developement for an action-cam-based eye tracking device (10 categories)
- Implementing Configurable Dual-Core Redundancy (10 categories)
- A Snitch-Based SoC on iCE40 FPGAs (1-2S/B) (10 categories)
- Spatio-Temporal Video Filtering (10 categories)
- Multi issue OoO Ariane Backend (M) (10 categories)
- Watchdog Timer for PULP (10 categories)
- Data Augmentation Techniques in Biosignal Classification (10 categories)
- Shared Correlation Accelerator for an RF SoC (10 categories)
- PULPonFPGA: Lightweight Virtual Memory Support - Physically Contiguous Memory (10 categories)
- Smart Meters (10 categories)
- Physical Implementation of Ara, PULP's Vector Machine (1-2S) (10 categories)
- Creating A Boundry Scan Generator (1-3S/B/2-3G) (10 categories)
- Scaleout Study on Interleaved Memory Transfers in Huge Manycore Systems with Multiple HBM Channels (M/1-3S) (10 categories)
- Intelligent Disaster Early-Warning System (1-2S/M) (10 categories)
- Streaming Layer Normalization in ITA (M/1-2S) (10 categories)
- Towards Formal Verification of the iDMA Engine (1-3S/B) (10 categories)
- PULPonFPGA: Lightweight Virtual Memory Support - Software Cache (10 categories)
- Bridging QuantLab with LPDNN (10 categories)
- IP-Based SoC Generation and Configuration (1-3S/B) (10 categories)
- Creating A Technology-independent USB1.0 Host Implementation Targetting ASICSs (1-3S/B) (10 categories)
- Development Of A Test Bed For Ultrasonic Transducer Characterization (1 S/B) (10 categories)
- Ultrasound measurement of microbubble stiffness for in situ detection of protease activity in clinical settings (10 categories)
- PULP’s CLIC extensions for fast interrupt handling (10 categories)
- Improved Collision Avoidance for Nano-drones (10 categories)
- Creating a Compact Power Supply and Monitoring System for the Occamy Chip (1-3S/B/2-3G) (9 categories)
- ML based Quantitative Movement Analysis on a Portable IoT Camera (1-2S/B) (9 categories)
- Extreme-Edge Experience Replay for Keyword Spotting (9 categories)
- High-Speed SAR ADC for next generation wireless communication in 12nm FinFET (9 categories)
- A Multiview Synthesis Core in 65 nm CMOS (9 categories)
- Advanced 5G Repetition Combining (9 categories)