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From iis-projects
Showing below up to 50 results in range #301 to #350.
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- (hist) EEG artifact detection with machine learning [4,211 bytes]
- (hist) Efficient Memory Stream Handling in RISC-V-based Systems (M/1-2S) [4,183 bytes]
- (hist) Physics is looking for PULP [4,170 bytes]
- (hist) Scattering Networks for Scene Labeling [4,163 bytes]
- (hist) A Wireless Sensor Network for a Smart Building Monitor and Control [4,148 bytes]
- (hist) Forward error-correction ASIC using GRAND [4,141 bytes]
- (hist) New RVV 1.0 Vector Instructions for Ara [4,140 bytes]
- (hist) Efficient Execution of Transformers in RISC-V Vector Machines with Custom HW acceleration (M) [4,135 bytes]
- (hist) Passive and Self Sustaining Receivers For On and Intra Body Communication For Wearable Sensors Networks [4,132 bytes]
- (hist) Ultra Low Power Wake Up Radio for Wireless Sensor Network [4,116 bytes]
- (hist) Internet of Things Network Synchronizer [4,097 bytes]
- (hist) Modeling FlooNoC in GVSoC (S/M) [4,093 bytes]
- (hist) Advanced Physical Design: Reinforcement Learning for Macro Placement and Mix-Placer (B/1-2S) [4,090 bytes]
- (hist) Optimal System Duty Cycling for a Mobile Health Platform [4,070 bytes]
- (hist) IcySoC [4,070 bytes]
- (hist) Design of a Low Power Smart Sensing Multi-modal Vision Platform [4,069 bytes]
- (hist) Software-Defined Paging in the Snitch Cluster (2-3S) [4,036 bytes]
- (hist) Implementation of the RISC-V Bit Manipulation (RVB) extensions for our RISC-V core [4,019 bytes]
- (hist) Smart Agriculture System (1-2S) [4,013 bytes]
- (hist) Hardware/software codesign neural decoding algorithm for “neural dust” [4,005 bytes]
- (hist) Design of an on-field adaptable pulse-processing unit for semicondutor radiation detectors [4,002 bytes]
- (hist) Unconventional phase change memory device concepts for in-memory and neuromorphic computin [4,001 bytes]
- (hist) Intelligent Disaster Early-Warning System (1-2S/M) [3,999 bytes]
- (hist) Android reliability governor [3,997 bytes]
- (hist) Design of a CAN Interface to Enable Reliable Sensors-to-Processors Communication for Automotive-oriented Embedded Applications (1M) [3,975 bytes]
- (hist) Bandwidth Efficient NEureka [3,968 bytes]
- (hist) Finite element modeling of electrochemical random access memory [3,967 bytes]
- (hist) Low Power One bit Microphone for Acoustic Imaging Using A Parallel Processor [3,967 bytes]
- (hist) PULP’s CLIC extensions for fast interrupt handling [3,953 bytes]
- (hist) A Multiview Synthesis Core in 65 nm CMOS [3,896 bytes]
- (hist) PREM Intervals and Loop Tiling [3,888 bytes]
- (hist) A Recurrent Neural Network Speech Recognition Chip [3,884 bytes]
- (hist) Completed [3,883 bytes]
- (hist) Energy-Efficient Brain-Inspired Hyperdimensional Computing [3,880 bytes]
- (hist) Time and Frequency Synchronization in LTE Cat-0 Devices [3,870 bytes]
- (hist) Implementing Configurable Dual-Core Redundancy [3,867 bytes]
- (hist) RVfplib [3,867 bytes]
- (hist) SmartRing [3,866 bytes]
- (hist) Implementation of the RISC-V Bit Manipulation (RVB) extensions for our RI5CY core [3,856 bytes]
- (hist) Real-Time Embedded Systems [3,849 bytes]
- (hist) Development of a fingertip blood pressure sensor [3,837 bytes]
- (hist) Object Detection and Tracking on the Edge [3,829 bytes]
- (hist) Low Precision Ara for ML [3,826 bytes]
- (hist) Non-blocking Algorithms in Real-Time Operating Systems [3,820 bytes]
- (hist) Waterflow Monitoring with Doppler Ultrasound (1S) [3,805 bytes]
- (hist) Autonomous Smart Watches: Toward an ultra low power microphone detector with events classification [3,798 bytes]
- (hist) Design Of A Biomarker Assay Based On Responsive Magnetic Nanoparticles [3,795 bytes]
- (hist) Real-time View Synthesis using Image Domain Warping [3,792 bytes]
- (hist) Streaming Layer Normalization in ITA (M/1-2S) [3,785 bytes]
- (hist) Design and Exploitation of a Test-Bench for Non-Destructive Characterization of the Susceptibility of Silicon Carbide (SiC) Power Devices to Cosmic Radiation [3,776 bytes]