Pages with the most categories
From iis-projects
Showing below up to 50 results in range #81 to #130.
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- In-ear EEG signal acquisition (11 categories)
- A Flexible FPGA-Based Peripheral Platform Extending Linux-Capable Systems on Chip (1-3S/B) (11 categories)
- Modeling FlooNoC in GVSoC (S/M) (11 categories)
- Non-blocking Algorithms in Real-Time Operating Systems (11 categories)
- Spectrometry for Environmental Monitoring (1-2S/M) (11 categories)
- A Flexible Peripheral System for High-Performance Systems on Chip (M) (11 categories)
- Extension and Evaluation of TinyDMA (1-2S/B/2-3G) (11 categories)
- Predict eye movement through brain activity (11 categories)
- Structural Health Monitoring (SHM) System (1-2S/M) (11 categories)
- Routing 1000s of wires in Network-on-Chips (1-2S/M) (11 categories)
- Physical Implementation of MemPool, PULP's Manycore System (1M/1-2S) (10 categories)
- ISA extensions in the Snitch Processor for Signal Processing (M) (10 categories)
- Development Of An FPGA-Based Optoacoustic Image Reconstruction Platform for Clinical Applications (10 categories)
- Zephyr RTOS on PULP (10 categories)
- Floating-Point Divide & Square Root Unit for Transprecision (10 categories)
- A Unified Compute Kernel Library for Snitch (1-2S) (10 categories)
- IoT Turbo Decoder (10 categories)
- Real-Time Embedded Classification of Neural Activity in Rat Barrel Cortex (10 categories)
- Deep Learning-based Global Local Planner for Autonomous Nano-drones (10 categories)
- Design of a Reconfigurable Vector Processor Cluster for Area Efficient Radar Processing (1M) (10 categories)
- Machine Learning for extracting Muscle features from Ultrasound raw data (10 categories)
- A Novel Execution Scheme for Ultra-tiny CNNs Aboard Nano-UAVs (10 categories)
- Enhancing our DMA Engine with Fault Tolerance (10 categories)
- PULP Freertos with LLVM (10 categories)
- An FPGA-Based Testbed for 3G Mobile Communications Receivers (10 categories)
- Design and Implementation of a Fully-digital Platform-independent Integrated Temperature Sensor Enabling DVFS in Open-source Tapeouts (1-3S/B) (10 categories)
- Timing Channel Mitigations for RISC-V Cores (10 categories)
- Machine Learning for extracting Muscle features using Ultrasound (10 categories)
- Extend the RI5CY core with priviledge extensions (10 categories)
- Ibex: Tightly-Coupled Accelerators and ISA Extensions (10 categories)
- Enhancing our DMA Engine with Vector Processing Capabilities (1-2S/B) (10 categories)
- Advanced Physical Design: Reinforcement Learning for Macro Placement and Mix-Placer (B/1-2S) (10 categories)
- Big Data Analytics Benchmarks for Ara (10 categories)
- Low Latency Brain-Machine Interfaces (10 categories)
- Graph neural networks for epileptic seizure detection (10 categories)
- PULPonFPGA: Hardware L2 Cache (10 categories)
- Taping a Safer Silicon Implementation of Snitch (M/2-3S) (10 categories)
- On-Board Software for PULP on a Satellite (10 categories)
- Softmax for Transformers (M/1-2S) (10 categories)
- Designing a Scalable Miniature I/O DMA (1-2B/1-3S/M) (10 categories)
- ASR-Waveformer (10 categories)
- Accelerator for Spatio-Temporal Video Filtering (10 categories)
- Wireless Communication Systems for the IoT (10 categories)
- Design of a CAN Interface to Enable Reliable Sensors-to-Processors Communication for Automotive-oriented Embedded Applications (1M) (10 categories)
- Air Quality Prediction in Office Rooms (1-2S/M) (10 categories)
- BirdGuard (10 categories)
- Implementation of the RISC-V Bit Manipulation (RVB) extensions for our RISC-V core (10 categories)
- Design of an Energy-Efficient Ethernet Interface for Linux-capable Systems (10 categories)
- Efficient TNN Inference on PULP Systems (10 categories)
- Fast Simulation of Manycore Systems (1S) (10 categories)
