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Showing below up to 100 results in range #351 to #450.

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  1. Deep Convolutional Autoencoder for iEEG Signals‏‎ (13:36, 9 September 2020)
  2. Positioning with Wireless Signals‏‎ (10:24, 28 September 2020)
  3. Heterogeneous SoCs‏‎ (18:41, 28 October 2020)
  4. Signal Acquisition and Clock Offset Compensation for High-Rate Pulse UWB PHYs‏‎ (12:09, 29 October 2020)
  5. Ara: Update PULP's Vector Processor with the recent RISC-V Vector Extension Development‏‎ (14:42, 29 October 2020)
  6. Channel Estimation for 5G Cellular IoT and Fast Fading Channels‏‎ (18:54, 29 October 2020)
  7. Power Optimization in Multipliers‏‎ (16:23, 30 October 2020)
  8. Evaluating the RiscV Architecture‏‎ (16:24, 30 October 2020)
  9. Energy Neutral Multi Sensors Wearable Device‏‎ (16:24, 30 October 2020)
  10. Bringing XNOR-nets (ConvNets) to Silicon‏‎ (16:25, 30 October 2020)
  11. Learning Image Compression with Convolutional Networks‏‎ (16:25, 30 October 2020)
  12. Improving our Smart Camera System‏‎ (16:26, 30 October 2020)
  13. AMZ Driverless Competition Embedded Systems Projects‏‎ (16:27, 30 October 2020)
  14. Nils Wistoff‏‎ (18:59, 30 October 2020)
  15. LightProbe‏‎ (14:14, 31 October 2020)
  16. IBM A2O Core‏‎ (11:15, 2 November 2020)
  17. PREM Runtime Scheduling Policies‏‎ (11:47, 2 November 2020)
  18. (M): A Flexible Peripheral System for High-Performance Systems on Chip‏‎ (12:16, 2 November 2020)
  19. Implementation of a Heterogeneous System for Image Processing on an FPGA‏‎ (12:48, 2 November 2020)
  20. SSR combined with FREP in LLVM/Clang‏‎ (13:02, 2 November 2020)
  21. DaCe on Snitch‏‎ (13:03, 2 November 2020)
  22. Implementation of a Heterogeneous System for Image Processing on an FPGA (S)‏‎ (17:26, 2 November 2020)
  23. MemPool on HERO‏‎ (18:42, 2 November 2020)
  24. ISA extensions in the Snitch Processor for Signal Processing (1M)‏‎ (19:24, 2 November 2020)
  25. Event-Driven Computing‏‎ (11:16, 5 November 2020)
  26. All-Digital In-Memory Processing‏‎ (12:23, 5 November 2020)
  27. A Recurrent Neural Network Speech Recognition Chip‏‎ (13:38, 10 November 2020)
  28. Energy-Efficient Brain-Inspired Hyperdimensional Computing‏‎ (13:38, 10 November 2020)
  29. Hardware Accelerators for Lossless Quantized Deep Neural Networks‏‎ (13:41, 10 November 2020)
  30. NVDLA meets PULP‏‎ (13:42, 10 November 2020)
  31. An Industrial-grade Bluetooth LE Mesh Network Solution‏‎ (15:34, 10 November 2020)
  32. Contextual Intelligence on Resource-constraint Bluetooth LE IoT Devices‏‎ (15:36, 10 November 2020)
  33. Embedded Gesture Recognition Using Novel Mini Radar Sensors‏‎ (15:36, 10 November 2020)
  34. A Wearable Wireless Kidney Function Monitoring System For BioMedical Applications‏‎ (15:37, 10 November 2020)
  35. Indoor Smart Tracking of Hospital instrumentation‏‎ (15:37, 10 November 2020)
  36. Wireless Sensing With Long Range Comminication (LoRa)‏‎ (15:37, 10 November 2020)
  37. Optogenetics And Game Theory Applied To Small Side Bird Using Smart Sensing‏‎ (15:38, 10 November 2020)
  38. Edge Computing for Long-Term Wearable Biomedical Systems‏‎ (15:38, 10 November 2020)
  39. Efficient Search Design for Hyperdimensional Computing‏‎ (15:39, 10 November 2020)
  40. Improving Cold-Start in Batteryless And Energy Harvesting Systems‏‎ (15:41, 10 November 2020)
  41. Energy Efficient Smart Devices For Construction Building Maintenance Hilti Collaboration‏‎ (15:41, 10 November 2020)
  42. Wearable Smart Camera With Deep Learning Algorithms For Automatic Detecion‏‎ (15:41, 10 November 2020)
  43. Adversarial Attacks Against Deep Neural Networks In Wearable Cameras‏‎ (15:41, 10 November 2020)
  44. Neuromorphic Intelligence In An Embedded System in Collaboration with AiCTX‏‎ (15:45, 10 November 2020)
  45. High-throughput Embedded System For Neurotechnology in collaboration with INI‏‎ (15:48, 10 November 2020)
  46. Design Of A Biomarker Assay Based On Responsive Magnetic Nanoparticles‏‎ (15:48, 10 November 2020)
  47. Pressure and acoustic Smart Sensors Network for Wind Turbines Monitoring‏‎ (15:48, 10 November 2020)
  48. Embedded Systems and autonomous UAVs‏‎ (16:59, 10 November 2020)
  49. Predictable Execution‏‎ (18:48, 10 November 2020)
  50. IP-Based SoC Generation and Configuration (1-3S)‏‎ (20:24, 10 November 2020)
  51. Design-Space Exploration of Low-Resolution Matrix-Vector Multipliers‏‎ (11:08, 12 November 2020)
  52. Low-Resolution 5G Beamforming Codebook Design‏‎ (11:37, 12 November 2020)
  53. Real-Time Optimization‏‎ (13:57, 12 November 2020)
  54. Deep Unfolding of Iterative Optimization Algorithms‏‎ (13:57, 12 November 2020)
  55. LightProbe - CNN-Based-Image-Reconstruction‏‎ (20:46, 12 November 2020)
  56. LightProbe - 192cha Multiplexer Stage (Rigid-Flex-PCB Project)‏‎ (20:47, 12 November 2020)
  57. Next-Gen Ultrasound Imaging Systems (Industry Student Projects & PhD Opportunity)‏‎ (20:48, 12 November 2020)
  58. Ultrasound High Speed Microbubble Tracking‏‎ (20:49, 12 November 2020)
  59. LightProbe - Thermal-Power aware on-head Beamforming‏‎ (20:50, 12 November 2020)
  60. LightProbe - Frontend Firmware and Control Side Channel‏‎ (20:51, 12 November 2020)
  61. 3D Ultrasound Bubble Tracking‏‎ (20:52, 12 November 2020)
  62. Satellite Internet of Things‏‎ (13:53, 13 November 2020)
  63. FPGA-based Testbed Implementation of an Extended-Coverage Point-to-Point Communication Link for the Internet of Things‏‎ (13:54, 13 November 2020)
  64. Next Generation Channel Decoder‏‎ (14:01, 13 November 2020)
  65. An all Standard-Cell Based Energy Efficient HW Accelerator for DSP and Deep Learning Applications‏‎ (15:31, 16 November 2020)
  66. FFT HDL Code Generator for Multi-Antenna mmWave Communication‏‎ (19:40, 16 November 2020)
  67. Autonomus Drones With Novel Sensors And Ultra Wide Band‏‎ (11:39, 30 November 2020)
  68. Smart Patch For Heath Care And Rehabilitation‏‎ (16:24, 30 November 2020)
  69. Matheus Cavalcante‏‎ (18:33, 8 December 2020)
  70. Improved Reacquisition for the 5G Cellular IoT‏‎ (14:04, 11 January 2021)
  71. ASIC Design of a Gaussian Message Passing Processor‏‎ (08:34, 20 January 2021)
  72. ASIC Design of a Sigma Point Processor‏‎ (08:34, 20 January 2021)
  73. Hardware Accelerator for Model Predictive Controller‏‎ (08:35, 20 January 2021)
  74. Fast Wakeup From Deep Sleep State‏‎ (08:35, 20 January 2021)
  75. Compressed Sensing for Wireless Biosignal Monitoring‏‎ (08:35, 20 January 2021)
  76. Convolution Neural Networks on our Ultra-Low Power Mult-Core Plattform PULP‏‎ (08:36, 20 January 2021)
  77. Autoencoder Accelerator for On-Chip Semi-Supervised Learning‏‎ (08:37, 20 January 2021)
  78. Extend the RI5CY core with priviledge extensions‏‎ (08:38, 20 January 2021)
  79. Implementation of the RISC-V Bit Manipulation (RVB) extensions for our RI5CY core‏‎ (08:42, 20 January 2021)
  80. MemPool on HERO (1S)‏‎ (19:07, 20 January 2021)
  81. Cerebellum: Design of a Programmable Smart-Peripheral for the Ariane Core‏‎ (19:05, 29 January 2021)
  82. Resilient Brain-Inspired Hyperdimensional Computing Architectures‏‎ (19:08, 29 January 2021)
  83. Level Crossing ADC For a Many Channels Neural Recording Interface‏‎ (19:10, 29 January 2021)
  84. RISC-V based Implementation of Secure Ranging According to IEEE 802.15.4z UWB‏‎ (19:10, 29 January 2021)
  85. Spiking Neural Network for Autonomous Navigation‏‎ (19:10, 29 January 2021)
  86. Event-Driven Convolutional Neural Network Modular Accelerator‏‎ (19:10, 29 January 2021)
  87. ASIC Design Projects‏‎ (19:13, 29 January 2021)
  88. Implementation of the RISC-V Bit Manipulation (RVB) extensions for our RISC-V core‏‎ (19:19, 29 January 2021)
  89. A Snitch-based Compute Accelerator for HERO (M/1-2S)‏‎ (23:59, 6 February 2021)
  90. Heroino: Design of the next CORE-V Microcontroller‏‎ (00:01, 7 February 2021)
  91. VLSI Implementation of a 5G Ciphering Accelerator‏‎ (10:05, 9 February 2021)
  92. OTDOA Positioning for LTE Cat-M‏‎ (15:50, 9 February 2021)
  93. ASIC Development of 5G-NR LDPC Decoder‏‎ (01:43, 10 February 2021)
  94. Wireless Communication Systems for the IoT‏‎ (01:45, 10 February 2021)
  95. Software-Defined Paging in the Snitch Cluster (2-3S)‏‎ (20:08, 15 February 2021)
  96. Event-Driven Vision on an embedded platform‏‎ (08:41, 17 February 2021)
  97. Efficient TNN compression‏‎ (08:41, 17 February 2021)
  98. Design and Evaluation of a Small Size Avalanche Beacon‏‎ (10:02, 22 February 2021)
  99. ISA extensions in the Snitch Processor for Signal Processing (M)‏‎ (00:08, 13 March 2021)
  100. A Flexible Peripheral System for High-Performance Systems on Chip (M)‏‎ (15:40, 15 March 2021)

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