Orphaned pages
From iis-projects
The following pages are not linked from or transcluded into other pages in iis-projects.
Showing below up to 100 results in range #51 to #150.
View (previous 100 | next 100) (20 | 50 | 100 | 250 | 500)
- Alias-Free Oscillator Synchronization for Arbitrary Waveforms
- Aliasing-Free Wavetable Music Synthesizer
- All the flavours of FFT on MemPool (1-2S/B)
- Ambient RF Energy harvesting for Wireless Sensor Network
- An Efficient Compiler Backend for Snitch (1S/B)
- An Energy Efficient Brain-Computer Interface using Mr.Wolf
- An FPGA-Based Evaluation Platform for Mobile Communications
- An FPGA-Based Testbed for 3G Mobile Communications Receivers
- An Industrial-grade Bluetooth LE Mesh Network Solution
- An RPC DRAM Implementation for Energy-Efficient ASICs (1-2S)
- An Ultra-Low-Power Neuromorphic Spiking Neuron Design
- An all Standard-Cell Based Energy Efficient HW Accelerator for DSP and Deep Learning Applications
- AnalogInt
- Analog Compute-in-Memory Accelerator Interface and Integration
- Analog Layout Engine
- Analog building blocks for mmWave manipulation
- Analysis of Low-Power Wide Area Network Technologies for the Internet of Things
- Android Software Design
- Android reliability governor
- Approximate Matrix Multiplication based Hardware Accelerator to achieve the next 10x in Energy Efficiency: Full System Intregration
- Approximate Matrix Multiplication based Hardware Accelerator to achieve the next 10x in Energy Efficiency: Training Strategy And Algorithmic optimizations
- Ara: Update PULP's Vector Processor with the recent RISC-V Vector Extension Development
- Artificial Reverberation for Embedded Systems
- Assessment of novel photovoltaic architectures by circuit simulation
- Audio DAC Conversion Jitter Measurement System
- Audio Video Preprocessing In Parallel Ultra Low Power Platform
- Audio Visual Speech Recognition (1S/1M)
- Audio Visual Speech Separation (1S/1M)
- Audio Visual Speech Separation and Recognition (1S/1M)
- Augmenting Our IPs with AXI Stream Extensions (M/1-2S)
- Autoencoder Accelerator for On-Chip Semi-Supervised Learning
- Automatic unplugging detection for Ultrasound probes
- Autonomous Mapping with Nano-Drones UWB and Novel Depth Sensors
- Autonomous Obstacle Avoidance with Nano-Drones and Novel Depth Sensors
- Autonomous Sensing For Trains In The IoT Era
- Autonomous Sensors For Underwater Monitoring In Smart Navy Systems
- Autonomous Smart Watches: Hardware and Software Desing
- Autonomous Smart Watches: Toward an ultra low power microphone detector with events classification
- Autonomus Drones With Novel Sensors And Ultra Wide Band
- BCI-controlled Drone
- BLISS - Battery-Less Identification System for Security
- Bandwidth Efficient NEureka
- Bandwidth Extension with Carrier Aggregation for Mobile Gigabit-Communication
- Bateryless Heart Rate Monitoring
- Battery indifferent wearable Ultrasound
- Beamspace processing for 5G mmWave massive MIMO on GPU
- Beat Cadence
- Beat DigRF
- Benchmarking RISC-V-based Accelerator Cards for Inference (multiple SA)
- Benchmarking a RISC-V-based Server on LLMs/Foundation Models (SA or MA)
- Benchmarking a heterogeneous 217-core MPSoC on HPC applications
- Benchmarking a heterogeneous 217-core MPSoC on HPC applications (M/1-3S)
- Benchmarking a heterogeneous 217-core MPSoC on HPC applications (M/1-3S))
- BigPULP: Multicluster Synchronization Extensions
- BigPULP: Shared Virtual Memory Multicluster Extensions
- Big Data Analytics Benchmarks for Ara
- Biomedical Systems on Chip
- BirdGuard
- Birds Long Term Monitoring With Ultra Low Power Wireless Sensor Node
- Bluetooth Low Energy network with optimized data throughput
- Bluetooth Low Energy receiver in 65nm CMOS
- Bridging QuantLab with LPDNN
- Bringing XNOR-nets (ConvNets) to Silicon
- Bringup and Evaluation of an Energy-efficient Heterogeneous Manycore Compute Platform (1-2S)
- Brunn test
- Build the Fastest 2G Modem Ever
- Building an RTL top level for a Mempool-based Heterogeneous SoC (M/1-3S)
- CLIC for the CVA6
- CMOS power amplifier for field measurements in MRI systems
- CPS Software-Configurable State-Machine
- Cell-Free mmWave Massive MIMO Communication
- Cell Measurements for the 5G Internet of Things
- Cerebellum: Design of a Programmable Smart-Peripheral for the Ariane Core
- Change-based Evaluation of Convolutional Neural Networks
- Channel Decoding for TD-HSPA
- Channel Estimation and Equalization for LTE Advanced
- Channel Estimation for 3GPP TD-SCDMA
- Channel Estimation for 5G Cellular IoT and Fast Fading Channels
- Channel Estimation for TD-HSPA
- Characterization of the susceptibility to cosmic radiation of wide bandgap power devices by radioactive sources and at cryogenic temperatures
- Characterization techniques for silicon photonics-Lumiphase
- Charge and heat transport through graphene nanoribbon based devices
- Charging System for Implantable Electronics
- Circuits and Systems for Nanoelectrode Array Biosensors
- Classification of Evoked Local-Field Potentials in Rat Barrel Cortex using Hyper-dimensional Computing
- Combining Multi Sensor Imaging and Machine Learning for Robust Far-Field Vision
- Combining Spiking Neural Networks with Hyperdimensional Computing for Autonomous Navigation
- Compiler Profiling and Optimizing
- Compressed Sensing Reconstruction on FPGA
- Compressed Sensing for Wireless Biosignal Monitoring
- Compression of Ultrasound data on FPGA
- Compression of iEEG Data
- Computation of Phonon Bandstructure in III-V Nanostructures
- Configurable Ultra Low Power LDO
- Contextual Intelligence on Resource-constraint Bluetooth LE IoT Devices
- Continual Learning for Adaptive EEG Monitoring in Epileptic Seizure Detection
- Contrastive Learning for Self-supervised Clustering of iEEG Data for Epileptic Patients
- Control an external ADC using Programmable Real-Time Unit (PRU) Subsystem on Beaglebone Black used as embedded HPC-performance-monitoring device
- Convolution Neural Networks on our Ultra-Low Power Mult-Core Plattform PULP
- Counter-based Fast Power Estimation using FPGAs (M/1-3S)
