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Showing below up to 50 results in range #21 to #70.
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- A Novel Execution Scheme for Ultra-tiny CNNs Aboard Nano-UAVs
- A Post-Simulation Trace-Based RISC-V GDB Debugging Server
- A RISC-V ISA Extension for Pseudo Dual-Issue Monte Carlo in Snitch (1M/2S)
- A RISC-V ISA Extension for Scalar Chaining in Snitch (M)
- A RISC-V fault-tolerant many-core accelerator for 5G Non-Terrestrial Networks (1-2S/B)
- A Snitch-based Compute Accelerator for HERO
- A Trustworthy Three-Factor Authentication System
- A Unified-Multiplier Based Hardware Architecture for Elliptic Curve Cryptography
- A Unified Compute Kernel Library for Snitch (1-2S)
- A Waypoint-based Navigation System for Nano-Size UAVs in GPS-denied Environments
- A Wearable System To Control Phone And Electronic Device Without Hands
- A Wearable System for long term monitoring of human physiological parameters with E skin sensors
- A Wearable Wireless Kidney Function Monitoring System For BioMedical Applications
- A Wireless Sensor Network for HPC monitoring
- A Wireless Sensor Network for a Smart Building Monitor and Control
- A computational memory unit using phase-change memory devices
- A mmWave Voltage-Controlled-Oscillator (VCO) for beyond 5G applications
- A reduction-capable AXI XBAR for fast M-to-1 communication (1M)
- Ab-initio Simulation of Strained Thermoelectric Materials
- Accelerating Applications Relying on Matrix-Vector-Product-Like Operations
- Accelerating Matrix Multiplication on a 216-core MPSoC (1M)
- Accelerating Stencil Workloads on Snitch using ISSRs (1-2S/B)
- Accelerators for object detection and tracking
- Accurate deep learning inference using computational memory
- Active-Set QP Solver on FPGA
- Advanced 5G Repetition Combining
- Advanced Data Movers for Modern Neural Networks
- Advanced EEG glasses
- Advanced Physical Design: Reinforcement Learning for Macro Placement and Mix-Placer (B/1-2S)
- Adversarial Attacks Against Deep Neural Networks In Wearable Cameras
- Air Quality Prediction in Office Rooms (1-2S/M)
- Alias-Free Oscillator Synchronization for Arbitrary Waveforms
- Aliasing-Free Wavetable Music Synthesizer
- All the flavours of FFT on MemPool (1-2S/B)
- Ambient RF Energy harvesting for Wireless Sensor Network
- An Efficient Compiler Backend for Snitch (1S/B)
- An Energy Efficient Brain-Computer Interface using Mr.Wolf
- An FPGA-Based Evaluation Platform for Mobile Communications
- An FPGA-Based Testbed for 3G Mobile Communications Receivers
- An Industrial-grade Bluetooth LE Mesh Network Solution
- An RPC DRAM Implementation for Energy-Efficient ASICs (1-2S)
- An Ultra-Low-Power Neuromorphic Spiking Neuron Design
- An all Standard-Cell Based Energy Efficient HW Accelerator for DSP and Deep Learning Applications
- AnalogInt
- Analog Compute-in-Memory Accelerator Interface and Integration
- Analog Layout Engine
- Analog building blocks for mmWave manipulation
- Analysis of Low-Power Wide Area Network Technologies for the Internet of Things
- Android Software Design
- Android reliability governor