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Showing below up to 50 results in range #101 to #150.

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101. HW/SW Safety and Security‏‎ (14 revisions)
102. Heroino: Design of the next CORE-V Microcontroller‏‎ (14 revisions)
103. Finite Element Simulations of Transistors for Quantum Computing‏‎ (14 revisions)
104. Physical Implementation of Ara, PULP's Vector Machine (1-2S)‏‎ (14 revisions)
105. High-speed Scene Labeling on FPGA‏‎ (14 revisions)
106. Towards global Brain-Computer Interfaces‏‎ (13 revisions)
107. Efficient collective communications in FlooNoC (1M)‏‎ (13 revisions)
108. Deep Learning for Brain-Computer Interface‏‎ (13 revisions)
109. Turbo Equalization for Cellular IoT‏‎ (13 revisions)
110. Physical Implementation of MemPool, PULP's Manycore System (1M/1-2S)‏‎ (13 revisions)
111. On-Board Software for PULP on a Satellite‏‎ (13 revisions)
112. Neural Recording Interface and Signal Processing‏‎ (13 revisions)
113. CLIC for the CVA6‏‎ (13 revisions)
114. High Power Efficient Digitally Controlled Oscillator Design for Cellular IOT‏‎ (13 revisions)
115. Level Crossing ADC For a Many Channels Neural Recording Interface‏‎ (13 revisions)
116. Integrated silicon photonic structures‏‎ (13 revisions)
117. GUI-developement for an action-cam-based eye tracking device‏‎ (13 revisions)
118. LAPACK/BLAS for FPGA‏‎ (13 revisions)
119. Shared Correlation Accelerator for an RF SoC‏‎ (13 revisions)
120. StoneEDGE: An EC-GSM-IoT and Evolved EDGE PHY ASIC‏‎ (13 revisions)
121. On-chip clock synthesizer design and porting‏‎ (13 revisions)
122. Cycle-Accurate Event-Based Simulation of Snitch Core‏‎ (13 revisions)
123. Gomeza old project1‏‎ (13 revisions)
124. Acceleration and Transprecision‏‎ (13 revisions)
125. A Wireless Sensor Network for a Smart LED Lighting control‏‎ (13 revisions)
126. Online Learning of User Features (1S)‏‎ (13 revisions)
127. MatPHY: An Open-Source Physical Layer Development Framework‏‎ (13 revisions)
128. ASIC implementation of a beamspace massive MIMO-OFDM detector for 5G/6G‏‎ (13 revisions)
129. ASIC implementation of an interpolation-based wideband massive MIMO detector‏‎ (12 revisions)
130. Design of a High-​performance Hybrid PTZ for Multimodal Vision Systems‏‎ (12 revisions)
131. Implementation of Computationally Efficient Scattering Mechanisms for Periodic Devices and 2D Materials‏‎ (12 revisions)
132. Efficient Digital Signal Processing in High-Channel-Count High-Frame-Rate 3D Ultrasound Imaging Systems‏‎ (12 revisions)
133. Stand-Alone Edge Computing with GAP8‏‎ (12 revisions)
134. Towards the Ariane Desktop: Display Output for Ariane on FPGA under Linux (S/B/G)‏‎ (12 revisions)
135. Real-Time Embedded Classification of Neural Activity in Rat Barrel Cortex‏‎ (12 revisions)
136. A RISC-V ISA Extension for Pseudo Dual-Issue Monte Carlo in Snitch (1M/2S)‏‎ (12 revisions)
137. PULPonFPGA: Hardware L2 Cache‏‎ (12 revisions)
138. Deep neural networks for seizure detection‏‎ (12 revisions)
139. Hardware Accelerators for Lossless Quantized Deep Neural Networks‏‎ (12 revisions)
140. Sensor Fusion for Rockfall Sensor Node‏‎ (12 revisions)
141. Ultrasound Doppler system development‏‎ (12 revisions)
142. Peak-to-average power Reduction‏‎ (12 revisions)
143. Digital Audio High Level Synthesis for FPGAs‏‎ (12 revisions - redirect page)
144. Spatio-Temporal Video Filtering‏‎ (12 revisions)
145. Investigation of Quantization Strategies for Retentive Networks (1S)‏‎ (12 revisions)
146. BigPULP: Multicluster Synchronization Extensions‏‎ (12 revisions)
147. Accelerating Matrix Multiplication on a 216-core MPSoC (1M)‏‎ (12 revisions)
148. Event-Driven Computing‏‎ (12 revisions)
149. Bridging QuantLab with LPDNN‏‎ (12 revisions)
150. Event-Driven Convolutional Neural Network Modular Accelerator‏‎ (12 revisions)

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