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• Federico Villani
  At IIS, Federico is working ultrasound systems and building a high performance ultrasound research platform. * High-Performance computing
  834 bytes (98 words) - 18:30, 8 November 2023
• User:Zarubaf
  * High Performance Computing
  427 bytes (47 words) - 22:24, 4 September 2017
• User:Chizhang
  ...and interfaces and am also interested in architecture for high-performance computing, energy-efficient hardware, heterogenous architectures, etc. * High Performance Computation
  1,021 bytes (116 words) - 16:17, 6 November 2022
• Toward hyperdimensional active perception: learning compressed sensorimotor control by demonstration
  [[Category:Herschmi]][[Category:Event-Driven Computing]] ...your goal would be to improve algorithms, and implementations based on HD computing
  2 KB (308 words) - 20:12, 9 February 2020
• Accelerating Stencil Workloads on Snitch using ISSRs (1-2S/B)
  [[Category:High Performance SoCs]] ...s relative to each grid point [1]. They are widespread in high-performance computing (HPC) and underly various problems in physical simulation, economics, and i
  3 KB (431 words) - 22:29, 19 January 2023
• Integrated Devices, Electronics, And Systems
  ...em designs. We are particularly interested in systems with wide bandwidth, high energy-​efficiency, low latency, and security. ...tegrated circuits and systems to address new applications, such as quantum computing, quantum sensing, and electronics-​photonics integration.
  1 KB (145 words) - 16:26, 27 September 2023
• User:Matheusd
  * High-Performance Computing
  890 bytes (104 words) - 14:16, 2 November 2020
• Matheus Cavalcante
  * High-Performance Computing
  890 bytes (104 words) - 18:33, 8 December 2020
• Heterogeneous SoCs
  ...terogeneous integration has allowed (not only) Apple to get high computing performance under tight power constraints.]] ...Heterogeneous systems on chip''' are currently one of the main drivers for performance-per-energy advancements in various application domains.
  3 KB (421 words) - 18:41, 28 October 2020
• Integrating an Open-Source Double-Precision Floating-Point DivSqrt Unit into CVFPU (1S)
  [[Category:High Performance SoCs]] ...fundamental for a large set of applications spanning from high-performance computing to neural network training. A flexible highly-parametrized open-source floa
  2 KB (307 words) - 15:40, 15 February 2024
• Benchmarking RISC-V-based Accelerator Cards for Inference (multiple SA)
  [[Category:High Performance SoCs]] ...e evolved from Embedded MCUs a few years ago, to high performance CPUs and computing cards today.
  3 KB (459 words) - 13:24, 12 April 2024
• Linux Driver for fine-grain and low overhead access to on-chip performance counters
  ...ng architectures are facing power/thermal challenges that are limiting the performance benefits of technology scaling. Optimizing for energy efficiency requires m ...ce with external monitors and not with the internal per-core architectural performance counters.
  3 KB (417 words) - 15:55, 9 September 2016
• Optimizing the Pipeline in our Floating Point Architectures (1S)
  [[Category:High Performance SoCs]] ...fundamental for a large set of applications spanning from high-performance computing to neural network training. FP architectures usually show a large critical
  3 KB (380 words) - 14:27, 15 May 2023
• Acceleration and Transprecision
  ...ccelerators are not limited to high performance sector alone. In low power computing, they allow complex tasks such as computer vision or cryptography to be per
  2 KB (275 words) - 17:05, 24 November 2023
• Towards a High-performance Open-source Verification Suite for AXI-based Systems (M/1-3S/B)
  <!-- Creating Towards a High-performance Open-source Verification Suite for AXI-based Systems (1-3S/B) --> [[Category:High Performance SoCs]]
  2 KB (290 words) - 09:38, 3 November 2023
• Evaluating The Use of Snitch In The PsPIN RISC-V In-network Accelerator (M)
  [[Category:High Performance SoCs]] ...programming model [2] based on PULP [3] for energy-efficient flexible high-performance in-network packet processing. So far we have used the traditional PULP clus
  3 KB (374 words) - 10:24, 3 November 2023
• Developing a Transposition Unit to Accelerate ML Workloads (1-3S/B)
  [[Category:High Performance SoCs]] ...s is an important operation used in countless applications from scientific computing to machine learning workloads.
  2 KB (214 words) - 09:39, 23 August 2023
• Low-Complexity MIMO Detection
  [[File:Low_complexity_mimo_bs6-crop.png|500px|thumb|High performance low-complexity iterative MIMO receiver.]] ...to implement a low complexity MIMO detection algorithm and to optimize its performance with state-of-the-art machine learning methods. Therefore, a novel 5G-compl
  4 KB (503 words) - 13:54, 30 May 2022
• User:Paulsc
  * Energy-efficient high-performance SoCs * Sparse computing.
  1 KB (148 words) - 19:02, 2 November 2020
• Signal-Processing and Data-Compression on Beaglebone Black used as embedded HPC-performance-monitoring device
  ...ng architectures are facing power/thermal challenges that are limiting the performance benefits of technology scaling. However, even if energy-efficiency is of pr ...en-source ARM-Linux loss-less implementations when available) for the best performance on our application-scenario.
  3 KB (351 words) - 16:19, 27 February 2018

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