List of redirects
From iis-projects
Showing below up to 20 results in range #21 to #40.
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- Belfanti → User:Belfanti
- Bioprojects → Biomedical Circuits, Systems, and Applications
- Build the Fastest 2G Modem → Build the Fastest 2G Modem Ever
- CLIC for the CVA 6 → CLIC for the CVA6
- Cell Measurements for the Internet of Things → Cell Measurements for the 5G Internet of Things
- Channel Shortening ASIC → Channel Shortening Prefilter
- Channel Shortening Prefilter → VLSI Implementation of a Channel Shortener
- Characterization techniques for silicon photonics → Implementation of Computationally Efficient Scattering Mechanisms for Periodic Devices and 2D Materials
- Coherence-Capable Write-Back L1 Data Cache for Ariane → Coherence-Capable Write-Back L1 Data Cache for Ariane (M)
- Configurable Ultra low power LDO → Configurable Ultra Low Power LDO
- Convolutional Network Accelerator → Design and Implementation of a Convolutional Neural Network Accelerator ASIC
- Convolutional Neural Networks in Bateryless Nodes → Gomeza old project4
- Cryogenic measurements and modeling of electrical devices → Design space exploration of InP Heterojunction Bipolar Transistors (DHBTs)
- DaCe on Snitch (M/1-3S) → LLVM and DaCe for Snitch (1-2S)
- Deep-Learning Phoneme Recognition from a Ultra-Low Power Spiking Cochlea → Deep-Learning Based Phoneme Recognition from a Ultra-Low Power Spiking Cochlea
- Design and Implementation of a multi-mode multi-master I2C Interface → Design and Implementation of a multi-mode multi-master I2C peripheral
- Design and VLSI Implementation of a Constrained-Viterbi Algorithm for 3GPP TD-HSPA → Design and VLSI Implementation of a Constrained-Viterbi Algorithm Equalizer for 3GPP TD-HSPA
- Design of Charge-Pump PLL in 28nm for 5G communication applications → Design of Charge-Pump PLL in 22nm for 5G communication applications
- Development Of A Test Bed For Ultrasonic Transducer Characterization → Development Of A Test Bed For Ultrasonic Transducer Characterization (1 S/B)
- Digital Audio High Level Synthesis → Digital Audio High Level Synthesis for FPGAs
