Pages that link to "Project Plan"
From iis-projects
The following pages link to Project Plan:
View (previous 50 | next 50) (20 | 50 | 100 | 250 | 500)- Design of low-offset dynamic comparators (← links)
- Radio Signal Direction Detection For Smart Glasses For Augmented Reality Applications (← links)
- Desing and Implementation Of Long Lasting Key Finder With Bleetooth Low Energy (← links)
- High Power Efficient Digitally Controlled Oscillator Design for Cellular IOT (← links)
- High Performance Digitally-Assisted Time Domain ADC Design for DPLL used in Cellular IOT (← links)
- Analysis and Design of Power Efficient RF/ mm-Wave LC-tank Oscillator in 28nm for 5G communication applications (← links)
- Design of Charge-Pump PLL in 22nm for 5G communication applications (← links)
- Sensor Fusion for Rockfall Sensor Node (← links)
- Interfacing PULP with a Brain-Inspired Ultra-Low Power Spiking Cochlea (← links)
- Towards Online Training of CNNs: Hebbian-Based Deep Learning (← links)
- LightProbe - Implementation of compressed-sensing algorithms (← links)
- Single-Bit-Synapse Spiking Neural System-on-Chip (← links)
- Deep-Learning Based Phoneme Recognition from a Ultra-Low Power Spiking Cochlea (← links)
- Tiny CNNs for Ultra-Efficient Object Detection on PULP (← links)
- PULP-Shield for Autonomous UAV (← links)
- Convolution Neural Networks on our Ultra-Low Power Mult-Core Plattform PULP (← links)
- Development of a syringe label reader for the neurocritical care unit (← links)
- Autonomous Sensing For Trains In The IoT Era (← links)
- High performance continuous-time Delta-Sigma ADC for magnetic resonance imaging (← links)
- 5G Cellular RF Front-end Design in 22nm CMOS Technology (← links)
- Energy-Efficient Brain-Inspired Hyperdimensional Computing (← links)
- Hardware Accelerators for Lossless Quantized Deep Neural Networks (← links)
- Autoencoder Accelerator for On-Chip Semi-Supervised Learning (← links)
- Low-Energy Cluster-Coupled Vector Coprocessor for Special-Purpose PULP Acceleration (← links)
- Embedded Audio Source Localization Exploiting Coincidence Detection in Asynchronous Spike Streams (← links)
- A computational memory unit using phase-change memory devices (← links)
- Deep Learning for Brain-Computer Interface (← links)
- Variable Bit Precision Logic for Deep Learning and Artificial Intelligence (← links)
- Resilient Brain-Inspired Hyperdimensional Computing Architectures (← links)
- Trace Debugger for custom RISC-V Core (← links)
- Efficient Search Design for Hyperdimensional Computing (← links)
- LightProbe - WIFI extension (PCB) (← links)
- Creating a HDMI Video Interface for PULP (← links)
- Hyper Meccano: Acceleration of Hyperdimensional Computing (← links)
- A Wireless Sensor Network for HPC monitoring (← links)
- Neural Networks Framwork for Embedded Plattforms (← links)
- Real-Time Implementation of Quantum State Identification using an FPGA (← links)
- CMOS power amplifier for field measurements in MRI systems (← links)
- Design of a 25 Gbps SerDes for optical chip-to-chip communication (← links)
- Inductive Charging Circuit for Implantable Devices (← links)
- Low Power Geolocalization And Indoor Localization (← links)
- High Speed FPGA Trigger Logic for Particle Physics Experiments (← links)
- Wake Up Radio For Energy Efficient Communication System and IC Design (← links)
- Zero Power Touch Sensor and Reciever For Body Communication (← links)
- A Waypoint-based Navigation System for Nano-Size UAVs in GPS-denied Environments (← links)
- Monocular Vision-based Object Following on Nano-size Robotic Blimp (← links)
- Towards Autonomous Navigation for Nano-Blimps (← links)
- Study and Development of Intelligent Capability for Small-Size UAVs (← links)
- Towards Self-Sustainable Unmanned Aerial Vehicles (← links)
- Digital Audio Interface for Smart Intensive Computing Triggering (← links)