Category:Semester Thesis
From iis-projects
Semester thesis at the IIS is for 1-3 students for a duration of 14 weeks and should take 50% of the time of the students. The available projects in this category are meant primarily for a semester thesis. However if you are interested in the topic, you can discuss with the supervisor, in most cases the content of the project can be expanded to fit a master thesis as well.
Pages in category "Semester Thesis"
The following 100 pages are in this category, out of 522 total.
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- Satellite Internet of Things
- Scalable Heterogeneous L1 Memory Interconnect for Smart Accelerator Coupling in Ultra-Low Power Multicores
- Scaleout Study on Interleaved Memory Transfers in Huge Manycore Systems with Multiple HBM Channels (M/1-3S)
- Scan Chain Fault Injection in a PULP SoC (1S)
- Scattering Networks for Scene Labeling
- SCMI Support for Power Controller Subsystem
- Securing Block Ciphers against SCA and SIFA
- Self-Learning Drones based on Neural Networks
- Shared Correlation Accelerator for an RF SoC
- Short Range Radars For Biomedical Application
- Signal to Noise Ratio Estimation for 3G standards
- Signal-Processing and Data-Compression on Beaglebone Black used as embedded HPC-performance-monitoring device
- Simulation of 2D artificial cilia metasurface in COMSOL
- Skin Coupling Media Characterization For Fitness Tracker Applications (1 B/S)
- Smart Agriculture System (1-2S)
- Smart e-glasses for concealed recording of EEG signals
- Smart Goggles for Visual In-Action Feedback in Ski Jumping (1 M 1-2B/S)
- Smart Meters
- Smart Patch For Heath Care And Rehabilitation
- Smart Wearable System For Vital Sign Monitoring Exploiting On Board and Cloud Machine Learning
- SmartRing
- Softmax for Transformers (M/1-2S)
- Sound-Based Vehicle Classification and Counting (1-2S)
- Spatio-Temporal Video Filtering
- Spatz grows wings: Physical Implementation of a Vector-Powered Manycore System (2S)
- Spectrometry for Environmental Monitoring (1-2S/M)
- Spiking Neural Network for Autonomous Navigation
- Spiking Neural Network for Motor Function Decoding Based on Neural Dust
- Stand-Alone Edge Computing with GAP8
- Standard Cell Compatible Memory Array Design
- Streaming Layer Normalization in ITA (M/1-2S)
- Structural Health Monitoring (SHM) System (1-2S/M)
- Sub-Noise Floor Channel Tracking
- Successive Approximation Register (SAR) ADC
- Super Resolution Radar/Imaging at mm-Wave frequencies
- Switched-capacitor power amplifier for IoT mobile communications: design of signal processing path
- Synchronisation and Cyclic Prefix Handling For LTE Testbed
- System Emulation for AR and VR devices
T
- Taping a Safer Silicon Implementation of Snitch (M/2-3S)
- Ternary Neural Networks for Face Recognition
- Testbed Design for Self-sustainable IoT Sensors
- Thermal Control of Mobile Devices
- Time and Frequency Synchronization in LTE Cat-0 Devices
- Time Gain Compensation for Ultrasound Imaging
- Time Synchronization for 3G Mobile Communications
- Tiny CNNs for Ultra-Efficient Object Detection on PULP
- Toward hyperdimensional active perception: learning compressed sensorimotor control by demonstration
- Toward Superposition of Brain-Computer Interface Models
- Towards a High-performance Open-source Verification Suite for AXI-based Systems (M/1-3S/B)
- Towards a Technology-independent and Synthesizable AXI4 Performance Monitoring and Throttling Unit (1-2S)
- Towards Autonomous Navigation for Nano-Blimps
- Towards Flexible and Printable Wearables
- Towards Formal Verification of the iDMA Engine (1-3S/B)
- Towards global Brain-Computer Interfaces
- Towards Online Training of CNNs: Hebbian-Based Deep Learning
- Towards Self-Sustainable Unmanned Aerial Vehicles
- Towards the Ariane Desktop: Display Output for Ariane on FPGA under Linux (S/B/G)
- Towards The Integration of E-skin into Prosthetic Devices
- Trace Debugger for custom RISC-V Core
- Training and Deploying Next-Generation Quantized Neural Networks on Microcontrollers
- Triple-Core PULPissimo
U
- Ultra Low Power Wake Up Radio for Wireless Sensor Network
- Ultra low power wearable ultrasound probe
- Ultra Low-Power Oscillator
- Ultra-low power processor design
- Ultra-low power sampling front-end for acquisition of physiological signals
- Ultra-low power transceiver for implantable devices
- Ultra-wideband Concurrent Ranging
- Ultrafast Medical Ultrasound imaging on a GPU
- Ultrasound based hand gesture recognition
- Ultrasound Doppler system development
- Ultrasound High Speed Microbubble Tracking
- Ultrasound image data recycler
- Ultrasound Low power WiFi with IMX7
- Ultrasound measurement of microbubble stiffness for in situ detection of protease activity in clinical settings
- Ultrasound signal processing acceleration with CUDA
- Ultrasound-EMG combined hand gesture recognition
- Unconventional phase change memory device concepts for in-memory and neuromorphic computin
- Using Motion Sensors to Support Indoor Localization
V
- Variability Tolerant Ultra Low Power Cluster
- Vector-based Parallel Programming Optimization of Communication Algorithm (1-2S/B)
- Visualization of Neural Architecture Search Spaces
- Visualizing Functional Microbubbles using Ultrasound Imaging
- VLSI Implementation of a 5G Ciphering Accelerator
- VLSI Implementation of a Low-Complexity Channel Shortener for 2G EC-GSM-IoT and Evolved EDGE
W
- Wake Up Radio For Energy Efficient Communication System and IC Design
- Watchdog Timer for PULP
- Waterflow Monitoring with Doppler Ultrasound (1S)
- Wearable Smart Camera With Deep Learning Algorithms For Automatic Detecion
- Wearable Ultrasound for Artery monitoring
- Wearables in Fashion
- Wiederverwendung (reuse) ganzer Funktionsblöcke beim VLSI-Entwurf
- Wireless Communication Systems for the IoT
- Wireless In Action Data Streaming in Ski Jumping (1 B/S)
- Wireless Sensing With Long Range Comminication (LoRa)
- Writing a Hero runtime for EPAC (1-3S/B)