Difference between revisions of "Implementation of a Small and Energy-Efficient RISC-V-based Vector Accelerator (1M)"
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Revision as of 12:45, 4 August 2021
Overview
Status: Available
- Type: Master's Thesis
- Professor: Prof. Dr. L. Benini
- Supervisors:
Prerequisites
- VLSI I
- SoCDAML (recommended)
- Experience with SystemVerilog
