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Showing below up to 100 results in range #251 to #350.
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- Sensor Fusion for Rockfall Sensor Node (11:51, 21 August 2018)
- Development of a Rockfall Sensor Node (11:55, 21 August 2018)
- BigPULP: Shared Virtual Memory Multicluster Extensions (15:05, 23 August 2018)
- Cryptography (21:04, 24 August 2018)
- IoT Turbo Decoder (09:37, 14 September 2018)
- Shared Correlation Accelerator for an RF SoC (09:38, 14 September 2018)
- Engineering For Kids (16:11, 18 September 2018)
- Turbo Equalization for Cellular IoT (11:43, 13 November 2018)
- PREM on PULP (18:20, 20 November 2018)
- Taimir Aguacil (16:24, 23 November 2018)
- Analog IC Design (18:10, 4 December 2018)
- Brunn test (12:02, 5 December 2018)
- Karim Badawi (15:06, 5 December 2018)
- Low-Energy Cluster-Coupled Vector Coprocessor for Special-Purpose PULP Acceleration (15:50, 7 December 2018)
- Trace Debugger for custom RISC-V Core (11:27, 11 December 2018)
- Digital Audio Interface for Smart Intensive Computing Triggering (17:27, 22 January 2019)
- Scalable Heterogeneous L1 Memory Interconnect for Smart Accelerator Coupling in Ultra-Low Power Multicores (21:21, 29 January 2019)
- Moritz Schneider (16:36, 30 January 2019)
- Pulse Oximetry Fachpraktikum (15:59, 18 February 2019)
- Elliptic Curve Accelerator for zkSNARKs (15:02, 4 March 2019)
- Beat Cadence (11:01, 18 March 2019)
- Deep Learning for Brain-Computer Interface (20:22, 1 April 2019)
- Switched-capacitor power amplifier for IoT mobile communications: design of signal processing path (15:55, 6 May 2019)
- Ultra-low power sampling front-end for acquisition of physiological signals (16:06, 6 May 2019)
- CMOS power amplifier for field measurements in MRI systems (16:06, 6 May 2019)
- Analysis and Design of Power Efficient RF/ mm-Wave LC-tank Oscillator in 28nm for 5G communication applications (16:07, 6 May 2019)
- Design and implementation of the front-end for a portable ionizing radiation detector (12:23, 9 May 2019)
- Experimental Validation of Impact Ionization Models for TCAD Simulation by a Novel Characterization Technique (10:30, 5 June 2019)
- Design and Exploitation of a Test-Bench for Non-Destructive Characterization of the Susceptibility of Silicon Carbide (SiC) Power Devices to Cosmic Radiation (16:31, 5 June 2019)
- Freedom from Interference in Heterogeneous COTS SoCs (17:40, 19 June 2019)
- Predictable Execution on GPU Caches (17:41, 19 June 2019)
- PREM Intervals and Loop Tiling (18:00, 19 June 2019)
- Compiler Profiling and Optimizing (18:20, 19 June 2019)
- Extending the RISCV backend of LLVM to support PULP Extensions (18:27, 19 June 2019)
- NAND Flash Open Research Platform (11:06, 11 July 2019)
- Minimal Cost RISC-V core (17:24, 21 August 2019)
- A Demonstrator of Non-Synchronized Hyperdimensional Body Area Networks (16:42, 27 August 2019)
- Influence of the Initial FilamentGeometry on the Forming Step in CBRAM (18:39, 3 September 2019)
- Influence of the Initial Filament Geometry on the Forming Step in CBRAM (15:34, 4 September 2019)
- Simulation of Negative Capacitance Ferroelectric Transistor (15:37, 4 September 2019)
- Computation of Phonon Bandstructure in III-V Nanostructures (15:37, 4 September 2019)
- Design study of tunneling transistors based on a core/shell nanowire structures (15:38, 4 September 2019)
- Investigation of the source starvation effect in III-V MOSFET (15:40, 4 September 2019)
- Implementation of a 2-D model for Li-ion batteries (15:41, 4 September 2019)
- Ab-initio Simulation of Strained Thermoelectric Materials (15:43, 4 September 2019)
- Simulation of Li-ion batteries and comparison with experimental data (15:43, 4 September 2019)
- Full-band simulations of InP/GaAsSb/InP Double Heterojunction Bipolar Transistors (DHBTs) (15:44, 4 September 2019)
- Interfacing PULP with a Brain-Inspired Ultra-Low Power Spiking Cochlea (18:36, 5 September 2019)
- Design of Scalable Event-driven Neural-Recording Digital Interface (18:40, 5 September 2019)
- Near-Memory Training of Neural Networks (09:17, 11 September 2019)
- Application Specific Frequency Synthesizers (Analog/Digital PLLs) (14:52, 25 September 2019)
- EECIS (15:18, 25 September 2019)
- Deep-Learning Based Phoneme Recognition from a Ultra-Low Power Spiking Cochlea (16:33, 3 October 2019)
- AnalogInt (20:25, 25 October 2019)
- Cell Measurements for the 5G Internet of Things (11:55, 29 October 2019)
- Herschmi (15:03, 29 October 2019)
- Improving Resiliency of Hyperdimensional Computing (15:51, 29 October 2019)
- Toward Superposition of Brain-Computer Interface Models (15:52, 29 October 2019)
- Positioning for the cellular Internet of Things (13:14, 31 October 2019)
- Interference Cancellation for the cellular Internet of Things (13:15, 31 October 2019)
- Indoor Positioning with Bluetooth (12:12, 4 November 2019)
- Design of an LTE Module for the Internet of Things (14:20, 4 November 2019)
- Design of a VLIW processor architecture based on RISC-V (10:25, 5 November 2019)
- Design of a Fused Multiply Add Floating Point Unit (10:26, 5 November 2019)
- Audio Video Preprocessing In Parallel Ultra Low Power Platform (10:27, 5 November 2019)
- PULPonFPGA: Hardware L2 Cache (10:27, 5 November 2019)
- Image and Video Processing (10:29, 5 November 2019)
- DMA Streaming Co-processor (10:30, 5 November 2019)
- Developing a small portable neutron detector for detecting smuggled nuclear material (10:32, 5 November 2019)
- Accelerators for object detection and tracking (10:57, 5 November 2019)
- Design of an on-field adaptable pulse-processing unit for semicondutor radiation detectors (18:26, 5 November 2019)
- Characterization of the susceptibility to cosmic radiation of wide bandgap power devices by radioactive sources and at cryogenic temperatures (18:33, 5 November 2019)
- Ternary Weights Engine For Efficient Many Channels Spike Sorting Applications (10:05, 18 November 2019)
- HERO: TLB Invalidation (17:19, 18 November 2019)
- FPGA Testbed Implementation for Bluetooth Indoor Positioning (21:47, 18 November 2019)
- PULPonFPGA: Lightweight Virtual Memory Support - Software Cache (13:43, 29 November 2019)
- PULPonFPGA: Lightweight Virtual Memory Support - Physically Contiguous Memory (13:43, 29 November 2019)
- Exploring Algorithms for Early Seizure Detection (18:47, 6 January 2020)
- Toward hyperdimensional active perception: learning compressed sensorimotor control by demonstration (20:12, 9 February 2020)
- Pirmin Vogel (15:39, 3 March 2020)
- Real-Time ECG Contractions Classification (19:15, 9 March 2020)
- Real-Time Embedded Classification of Neural Activity in Rat Barrel Cortex (19:20, 9 March 2020)
- Final Presentation (18:53, 22 March 2020)
- A computational memory unit using phase-change memory devices (11:33, 17 April 2020)
- Accurate deep learning inference using computational memory (12:51, 17 April 2020)
- Palm size chip NMR (19:29, 7 May 2020)
- Timing Channel Mitigations for RISC-V Cores (18:16, 20 May 2020)
- Nanoelectrode array biosensors - programmable non-overlapping clocks generator project (07:56, 26 May 2020)
- Circuits and Systems for Nanoelectrode Array Biosensors (13:27, 26 May 2020)
- An Energy Efficient Brain-Computer Interface using Mr.Wolf (11:09, 21 July 2020)
- TCNs vs. LSTMs for Embedded Platforms (11:10, 21 July 2020)
- Subject specific embeddings for transfer learning in brain-computer interfaces (11:12, 21 July 2020)
- Exploring features and algorithms for ultra-low-power closed-loop systems for epilepsy control (11:22, 21 July 2020)
- A Snitch-based Compute Accelerator for HERO (14:58, 29 July 2020)
- Tbenz (16:48, 29 July 2020)
- Stefan Mach (17:06, 29 July 2020)
- Floating-Point Divide & Square Root Unit for Transprecision (17:09, 29 July 2020)
- IBM Research–Zurich (17:40, 10 August 2020)
- Ibex: Bit-Manipulation Extension (09:45, 28 August 2020)
- Ibex: FPGA Optimizations (09:45, 28 August 2020)
