Personal tools

Pages with the most revisions

From iis-projects

Jump to: navigation, search

Showing below up to 100 results in range #101 to #200.

View (previous 100 | next 100) (20 | 50 | 100 | 250 | 500)

  1. Heroino: Design of the next CORE-V Microcontroller‏‎ (14 revisions)
  2. PULP in space - Fault Tolerant PULP System for Critical Space Applications‏‎ (14 revisions)
  3. Finite Element Simulations of Transistors for Quantum Computing‏‎ (14 revisions)
  4. High-speed Scene Labeling on FPGA‏‎ (14 revisions)
  5. StoneEDGE: An EC-GSM-IoT and Evolved EDGE PHY ASIC‏‎ (13 revisions)
  6. Efficient collective communications in FlooNoC (1M)‏‎ (13 revisions)
  7. Deep Learning for Brain-Computer Interface‏‎ (13 revisions)
  8. Towards global Brain-Computer Interfaces‏‎ (13 revisions)
  9. CLIC for the CVA6‏‎ (13 revisions)
  10. Level Crossing ADC For a Many Channels Neural Recording Interface‏‎ (13 revisions)
  11. Shared Correlation Accelerator for an RF SoC‏‎ (13 revisions)
  12. Turbo Equalization for Cellular IoT‏‎ (13 revisions)
  13. On-chip clock synthesizer design and porting‏‎ (13 revisions)
  14. High Power Efficient Digitally Controlled Oscillator Design for Cellular IOT‏‎ (13 revisions)
  15. Integrated silicon photonic structures‏‎ (13 revisions)
  16. LAPACK/BLAS for FPGA‏‎ (13 revisions)
  17. GUI-developement for an action-cam-based eye tracking device‏‎ (13 revisions)
  18. Online Learning of User Features (1S)‏‎ (13 revisions)
  19. Cycle-Accurate Event-Based Simulation of Snitch Core‏‎ (13 revisions)
  20. MatPHY: An Open-Source Physical Layer Development Framework‏‎ (13 revisions)
  21. Gomeza old project1‏‎ (13 revisions)
  22. Acceleration and Transprecision‏‎ (13 revisions)
  23. Physical Implementation of MemPool, PULP's Manycore System (1M/1-2S)‏‎ (13 revisions)
  24. On-Board Software for PULP on a Satellite‏‎ (13 revisions)
  25. A Wireless Sensor Network for a Smart LED Lighting control‏‎ (13 revisions)
  26. Neural Recording Interface and Signal Processing‏‎ (13 revisions)
  27. ASIC implementation of a beamspace massive MIMO-OFDM detector for 5G/6G‏‎ (13 revisions)
  28. ASIC implementation of an interpolation-based wideband massive MIMO detector‏‎ (12 revisions)
  29. Peak-to-average power Reduction‏‎ (12 revisions)
  30. Sensor Fusion for Rockfall Sensor Node‏‎ (12 revisions)
  31. A RISC-V ISA Extension for Pseudo Dual-Issue Monte Carlo in Snitch (1M/2S)‏‎ (12 revisions)
  32. Deep neural networks for seizure detection‏‎ (12 revisions)
  33. Hardware Accelerators for Lossless Quantized Deep Neural Networks‏‎ (12 revisions)
  34. Towards the Ariane Desktop: Display Output for Ariane on FPGA under Linux (S/B/G)‏‎ (12 revisions)
  35. Investigation of Quantization Strategies for Retentive Networks (1S)‏‎ (12 revisions)
  36. Digital Audio High Level Synthesis for FPGAs‏‎ (12 revisions - redirect page)
  37. Scattering Networks for Scene Labeling‏‎ (12 revisions)
  38. Signal-Processing and Data-Compression on Beaglebone Black used as embedded HPC-performance-monitoring device‏‎ (12 revisions)
  39. Stand-Alone Edge Computing with GAP8‏‎ (12 revisions)
  40. BigPULP: Multicluster Synchronization Extensions‏‎ (12 revisions)
  41. Event-Driven Computing‏‎ (12 revisions)
  42. Bridging QuantLab with LPDNN‏‎ (12 revisions)
  43. Investigation of Redox Processes in CBRAM‏‎ (12 revisions)
  44. Linux Driver for built-in ADC using DMA and Programmable Real-Time Unit (PRU) support on Beaglebone Black used as embedded HPC-performance-monitoring device‏‎ (12 revisions)
  45. SmartRing‏‎ (12 revisions)
  46. Accelerating Matrix Multiplication on a 216-core MPSoC (1M)‏‎ (12 revisions)
  47. Event-Driven Convolutional Neural Network Modular Accelerator‏‎ (12 revisions)
  48. Covariant Feature Detector on Parallel Ultra Low Power Architecture‏‎ (12 revisions)
  49. Real-Time Embedded Classification of Neural Activity in Rat Barrel Cortex‏‎ (12 revisions)
  50. Image and Video Processing‏‎ (12 revisions)
  51. Exploring features and algorithms for ultra-low-power closed-loop systems for epilepsy control‏‎ (12 revisions)
  52. PULPonFPGA: Hardware L2 Cache‏‎ (12 revisions)
  53. Implementation of Computationally Efficient Scattering Mechanisms for Periodic Devices and 2D Materials‏‎ (12 revisions)
  54. Design of a High-​performance Hybrid PTZ for Multimodal Vision Systems‏‎ (12 revisions)
  55. Efficient Digital Signal Processing in High-Channel-Count High-Frame-Rate 3D Ultrasound Imaging Systems‏‎ (12 revisions)
  56. Spatio-Temporal Video Filtering‏‎ (12 revisions)
  57. Advanced EEG glasses‏‎ (11 revisions)
  58. Design of combined Ultrasound and Electromyography systems‏‎ (11 revisions)
  59. Baseband Processor Development for 4G IoT‏‎ (11 revisions)
  60. Evolved EDGE Physical Layer Incremental Redundancy Architecture‏‎ (11 revisions)
  61. Channel Estimation and Equalization for LTE Advanced‏‎ (11 revisions)
  62. Design and Implementation of a multi-mode multi-master I2C peripheral‏‎ (11 revisions)
  63. Design of combined Ultrasound and PPG systems‏‎ (11 revisions)
  64. Non-blocking Algorithms in Real-Time Operating Systems‏‎ (11 revisions)
  65. Feature Extraction with Binarized Descriptors: ASIC Implementation and FPGA Environment‏‎ (11 revisions)
  66. FPGA-Based Digital Frontend for 3G Receivers‏‎ (11 revisions)
  67. Hardware Constrained Neural Architechture Search‏‎ (11 revisions)
  68. LightProbe - WIFI extension (PCB)‏‎ (11 revisions)
  69. Audio Visual Speech Separation and Recognition (1S/1M)‏‎ (11 revisions)
  70. Adaptively Controlled Hysteresis Curve Tracer For Polymer Ultrasonic Transducers (1 S/B)‏‎ (11 revisions - redirect page)
  71. Energy-Efficient Brain-Inspired Hyperdimensional Computing‏‎ (11 revisions)
  72. Design space exploration of InP Heterojunction Bipolar Transistors (DHBTs)‏‎ (11 revisions)
  73. Real-time Linux on RISC-V‏‎ (11 revisions)
  74. Towards Online Training of CNNs: Hebbian-Based Deep Learning‏‎ (11 revisions)
  75. Interference Cancellation for EC-GSM-IoT‏‎ (11 revisions)
  76. Self-Learning Drones based on Neural Networks‏‎ (11 revisions)
  77. Design and Evaluation of a Small Size Avalanche Beacon‏‎ (11 revisions)
  78. Ultrasound Doppler system development‏‎ (11 revisions)
  79. FPGA System Design for Computer Vision with Convolutional Neural Networks‏‎ (11 revisions)
  80. Smart Goggles for Visual In-Action Feedback in Ski Jumping (1 M 1-2B/S)‏‎ (11 revisions)
  81. Deep Learning-based Global Local Planner for Autonomous Nano-drones‏‎ (11 revisions)
  82. Design of a Digital Audio Module for Ultra-Low Power Cellular Applications‏‎ (11 revisions)
  83. Timing Channel Mitigations for RISC-V Cores‏‎ (11 revisions)
  84. Pulse Oximetry Fachpraktikum‏‎ (11 revisions)
  85. Minimum Variance Beamforming for Wearable Ultrasound Probes‏‎ (11 revisions)
  86. FPGA acceleration of ultrasound computed tomography for in vivo tumor screening‏‎ (11 revisions)
  87. Monocular Vision-based Object Following on Nano-size Robotic Blimp‏‎ (11 revisions)
  88. PULPonFPGA: Lightweight Virtual Memory Support - Coherency Extensions‏‎ (11 revisions)
  89. Hardware Acceleration‏‎ (11 revisions)
  90. LightProbe - Implementation of compressed-sensing algorithms‏‎ (10 revisions)
  91. Design of Power-Noise-Efficient Discrete-Time Amplifier Using Open-Source Tools‏‎ (10 revisions)
  92. PULPonFPGA: Lightweight Virtual Memory Support - Multi-Level TLB‏‎ (10 revisions)
  93. Radiation Testing of a PULP ASIC‏‎ (10 revisions)
  94. Enabling Standalone Operation‏‎ (10 revisions)
  95. Quest for the smallest Turing-complete core (2-3G)‏‎ (10 revisions - redirect page)
  96. GSM Voice Capacity Evolution - VAMOS‏‎ (10 revisions)
  97. Efficient Memory Stream Handling in RISC-V-based Systems (M/1-2S)‏‎ (10 revisions)
  98. MCU Bus and Memory Generator: implementation of a Highly Configurable bus and memory subsystem for a RISC-V based microcontroller.‏‎ (10 revisions)
  99. Cell-Free mmWave Massive MIMO Communication‏‎ (10 revisions)
  100. Time Gain Compensation for Ultrasound Imaging‏‎ (10 revisions)

View (previous 100 | next 100) (20 | 50 | 100 | 250 | 500)