Revision as of 13:48, 27 March 2014

In this page you will find student and research projects at the Integrated Systems Laboratory of the ETH Zurich.

This is a uncompleted page.

The IIS Consists of 4 main research groups

• Analog and Mixed Signal Design
• IC and Systems, Design and Test
• Nano Electronics and Nano Photonics
• Nano-TCAD

On this webpage you can find links to

• Projects for which we are looking for students
• Projects that have been completed in the past
• List of Research projects

Projects in Progress

Digital Design

• Accelerating Matrix Multiplication on a 216-core MPSoC (1M)
• A RISC-V ISA Extension for Pseudo Dual-Issue Monte Carlo in Snitch (1M/2S)
• A reduction-capable AXI XBAR for fast M-to-1 communication (1M)
• Feature Extraction and Architecture Clustering for Keyword Spotting (1S)
• Resource Partitioning of Caches
• Investigating the Cost of Special-Case Handling in Low-Precision Floating-Point Dot Product Units (1S)
• Enabling Efficient Systolic Execution on MemPool (M)
• Efficient Execution of Transformers in RISC-V Vector Machines with Custom HW acceleration (M)
• Ternary Neural Networks for Face Recognition
• ASIC Development of 5G-NR LDPC Decoder
• Efficient TNN compression
• Coherence-Capable Write-Back L1 Data Cache for Ariane (M)
• Event-Driven Vision on an embedded platform
• An all Standard-Cell Based Energy Efficient HW Accelerator for DSP and Deep Learning Applications
• Channel Estimation for 5G Cellular IoT and Fast Fading Channels

↑ top

Links to Other IIS Webpages

http://www.iis.ee.ethz.ch

Integrated Systems Laboratory Main homepage

http://lne.ee.ethz.ch

Laboratory for Nanoelectronics homepage

http://www.nano-tcad.ethz.ch

Nano-TCAD group homepage

http://www.dz.ee.ethz.ch

Microelectronics Design Center

http://asic.ethz.ch/cg

The IIS-ASIC Chip Gallery

http://eda.ee.ethz.ch

EDA Wiki (ETH Zurich internal access only!)