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Showing below up to 50 results in range #101 to #150.

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101. Heroino: Design of the next CORE-V Microcontroller‏‎ (14 revisions)
102. PULP in space - Fault Tolerant PULP System for Critical Space Applications‏‎ (14 revisions)
103. Finite Element Simulations of Transistors for Quantum Computing‏‎ (14 revisions)
104. High-speed Scene Labeling on FPGA‏‎ (14 revisions)
105. StoneEDGE: An EC-GSM-IoT and Evolved EDGE PHY ASIC‏‎ (13 revisions)
106. Deep Learning for Brain-Computer Interface‏‎ (13 revisions)
107. Efficient collective communications in FlooNoC (1M)‏‎ (13 revisions)
108. Towards global Brain-Computer Interfaces‏‎ (13 revisions)
109. CLIC for the CVA6‏‎ (13 revisions)
110. Level Crossing ADC For a Many Channels Neural Recording Interface‏‎ (13 revisions)
111. Shared Correlation Accelerator for an RF SoC‏‎ (13 revisions)
112. Turbo Equalization for Cellular IoT‏‎ (13 revisions)
113. On-chip clock synthesizer design and porting‏‎ (13 revisions)
114. High Power Efficient Digitally Controlled Oscillator Design for Cellular IOT‏‎ (13 revisions)
115. Integrated silicon photonic structures‏‎ (13 revisions)
116. LAPACK/BLAS for FPGA‏‎ (13 revisions)
117. GUI-developement for an action-cam-based eye tracking device‏‎ (13 revisions)
118. Online Learning of User Features (1S)‏‎ (13 revisions)
119. Cycle-Accurate Event-Based Simulation of Snitch Core‏‎ (13 revisions)
120. Gomeza old project1‏‎ (13 revisions)
121. MatPHY: An Open-Source Physical Layer Development Framework‏‎ (13 revisions)
122. Acceleration and Transprecision‏‎ (13 revisions)
123. Physical Implementation of MemPool, PULP's Manycore System (1M/1-2S)‏‎ (13 revisions)
124. On-Board Software for PULP on a Satellite‏‎ (13 revisions)
125. A Wireless Sensor Network for a Smart LED Lighting control‏‎ (13 revisions)
126. Neural Recording Interface and Signal Processing‏‎ (13 revisions)
127. ASIC implementation of a beamspace massive MIMO-OFDM detector for 5G/6G‏‎ (13 revisions)
128. ASIC implementation of an interpolation-based wideband massive MIMO detector‏‎ (12 revisions)
129. Peak-to-average power Reduction‏‎ (12 revisions)
130. Sensor Fusion for Rockfall Sensor Node‏‎ (12 revisions)
131. A RISC-V ISA Extension for Pseudo Dual-Issue Monte Carlo in Snitch (1M/2S)‏‎ (12 revisions)
132. Deep neural networks for seizure detection‏‎ (12 revisions)
133. Hardware Accelerators for Lossless Quantized Deep Neural Networks‏‎ (12 revisions)
134. Towards the Ariane Desktop: Display Output for Ariane on FPGA under Linux (S/B/G)‏‎ (12 revisions)
135. Investigation of Quantization Strategies for Retentive Networks (1S)‏‎ (12 revisions)
136. Digital Audio High Level Synthesis for FPGAs‏‎ (12 revisions - redirect page)
137. Scattering Networks for Scene Labeling‏‎ (12 revisions)
138. Signal-Processing and Data-Compression on Beaglebone Black used as embedded HPC-performance-monitoring device‏‎ (12 revisions)
139. Stand-Alone Edge Computing with GAP8‏‎ (12 revisions)
140. BigPULP: Multicluster Synchronization Extensions‏‎ (12 revisions)
141. Event-Driven Computing‏‎ (12 revisions)
142. Bridging QuantLab with LPDNN‏‎ (12 revisions)
143. Investigation of Redox Processes in CBRAM‏‎ (12 revisions)
144. Linux Driver for built-in ADC using DMA and Programmable Real-Time Unit (PRU) support on Beaglebone Black used as embedded HPC-performance-monitoring device‏‎ (12 revisions)
145. SmartRing‏‎ (12 revisions)
146. Ultrasound Doppler system development‏‎ (12 revisions)
147. Accelerating Matrix Multiplication on a 216-core MPSoC (1M)‏‎ (12 revisions)
148. Event-Driven Convolutional Neural Network Modular Accelerator‏‎ (12 revisions)
149. Covariant Feature Detector on Parallel Ultra Low Power Architecture‏‎ (12 revisions)
150. Real-Time Embedded Classification of Neural Activity in Rat Barrel Cortex‏‎ (12 revisions)

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