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- 09:30, 12 April 2024 Benchmarking RISC-V-based Accelerator Cards for Inference (multiple SA) (hist) [3,265 bytes] Cykoenig (talk | contribs) (Created page with "<!-- Benchmarking RISC-V-based Accelerator Cards for Inference (multiple SA) --> Category:Digital Category:High Performance SoCs Category:2023 Category:Semester...")
- 20:22, 10 March 2024 Benchmarking a RISC-V-based Server on LLMs/Foundation Models (SA or MA) (hist) [2,793 bytes] Xiaywang (talk | contribs) (Created page with "<!-- Benchmarking a RISC-V-based Server on LLMs/Foundation Models (SA or MA) --> Category:Digital Category:High Performance SoCs Category:2023 Category:Master T...")
- 01:10, 29 February 2024 On-Device Learnable Embeddings for Acoustic Environments (hist) [10,834 bytes] Cioflanc (talk | contribs) (Created page with "<!-- On-Device Federated Continual Learning on Nano-Drone Swarms --> = Overview = == Status: Available == * Type: Semester Thesis * Professor: Prof. Dr. L. Benini * Supervi...")
- 00:49, 29 February 2024 On-Device Federated Continual Learning on Nano-Drone Swarms (hist) [10,073 bytes] Cioflanc (talk | contribs) (Created page with "<!-- On-Device Federated Continual Learning on Nano-Drone Swarms --> = Overview = == Status: Available == * Type: Semester Thesis * Professor: Prof. Dr. L. Benini * Supervi...")
- 00:02, 29 February 2024 ASR-Waveformer (hist) [10,179 bytes] Cioflanc (talk | contribs) (Created page with "<!-- ASR-Waveformer: Solving Automatic Speech Recognition through Linear Attention --> = Overview = == Status: Available == * Type: Semester Thesis * Professor: Prof. Dr. L...")
- 21:28, 22 February 2024 A RISC-V ISA Extension for Scalar Chaining in Snitch (M) (hist) [7,624 bytes] Colluca (talk | contribs) (Created page with "<!-- A RISC-V ISA Extension for Scalar Chaining in Snitch (1M) --> Category:Digital Category:High Performance SoCs Category:2024 Category:Master Thesis Cate...")
- 10:22, 21 February 2024 Neural Recording Interface and Spike Sorting Algorithm (hist) [3,516 bytes] Yiychen (talk | contribs) (Created page with "thumb|600px == Description == Over the last decades, an increasing burden that neurological disorders applied on patients and societies attracts more...")
- 15:54, 15 February 2024 Extending our FPU with Internal High-Precision Accumulation (M) (hist) [2,475 bytes] Lbertaccini (talk | contribs) (Created page with "<!-- Extending our FPU with Internal High-Precision Accumulation (M) --> Category:Digital Category:Acceleration_and_Transprecision Category:High Performance SoCs...")
- 13:56, 15 February 2024 Extreme-Edge Experience Replay for Keyword Spotting (hist) [8,980 bytes] Cioflanc (talk | contribs) (Created page with "<!-- Extreme-Edge Experience Replay for Keyword Spotting (1B/1S/1M) --> = Overview = == Status: Available == * Type: Semester Thesis * Professor: Prof. Dr. L. Benini * Supe...")
- 12:43, 12 February 2024 Building an RTL top level for a Mempool-based Heterogeneous SoC (M/1-3S) (hist) [3,351 bytes] Cykoenig (talk | contribs) (Created page with "<!-- Creating Extending the HERO RISC-V HPC stack to support multiple devices on heterogeneous SoCs (M/1-3S) --> Category:Digital Category:High Performance SoCs Cat...")
- 11:15, 25 January 2024 Extending the HERO RISC-V HPC stack to support multiple devices on heterogeneous SoCs (M/1-3S) (hist) [3,370 bytes] Cykoenig (talk | contribs) (Created page with "<!-- Creating Extending the HERO RISC-V HPC stack to support multiple devices on heterogeneous SoCs (M/1-3S) --> Category:Digital Category:High Performance SoCs Cat...")
- 11:08, 25 January 2024 Writing a Hero runtime for EPAC (1-3S/B) (hist) [3,620 bytes] Cykoenig (talk | contribs) (Created page with "<!-- Creating Creating A Technology-independent USB1.0 Host Implementation Targetting ASICSs (1-3S/B) --> Category:Digital Category:High Performance SoCs Category:H...")
- 09:47, 15 January 2024 FPGA mapping of RPC DRAM (hist) [3,396 bytes] Aottaviano (talk | contribs) (Created page with "<!-- FPGA mapping of RPC DRAM (1-2S/B) --> Category:Digital Category:Computer Architecture Category:SW/HW Predictability and Security Category:HW/SW Safety and...") originally created as "Erg"