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Showing below up to 50 results in range #51 to #100.

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51. Accelerator for Spatio-Temporal Video Filtering‏‎ (20 revisions)
52. Approximate Matrix Multiplication based Hardware Accelerator to achieve the next 10x in Energy Efficiency: Full System Intregration‏‎ (20 revisions)
53. Model Complexity of Electromagnetic Systems‏‎ (20 revisions)
54. Design and VLSI Implementation of a Constrained-Viterbi Algorithm Equalizer for 3GPP TD-HSPA‏‎ (20 revisions)
55. Accelerator for Boosted Binary Features‏‎ (20 revisions)
56. 4th Generation Synchronization‏‎ (19 revisions)
57. PULP’s CLIC extensions for fast interrupt handling‏‎ (19 revisions)
58. Wireless Communication Systems for the IoT‏‎ (19 revisions)
59. Trace Debugger for custom RISC-V Core‏‎ (19 revisions)
60. FFT-based Convolutional Network Accelerator‏‎ (19 revisions)
61. Low-Power Environmental Sensing‏‎ (18 revisions)
62. Mapping Networks on Reconfigurable Binary Engine Accelerator‏‎ (18 revisions)
63. VLSI Implementation of a Low-Complexity Channel Shortener for 2G EC-GSM-IoT and Evolved EDGE‏‎ (18 revisions)
64. Flexfloat DL Training Framework‏‎ (18 revisions)
65. ASIC Implementation of High-Throughput Next Generation Turbo Decoders‏‎ (18 revisions)
66. Improving Scene Labeling with Hyperspectral Data‏‎ (18 revisions)
67. David J. Mack‏‎ (18 revisions)
68. Nanoscale Hybrid III-V Plasmonic Laser for Low-Power Photonic ICs‏‎ (17 revisions)
69. Energy Efficient Circuits and IoT Systems Group‏‎ (17 revisions)
70. BLISS - Battery-Less Identification System for Security‏‎ (17 revisions)
71. Cerebellum: Design of a Programmable Smart-Peripheral for the Ariane Core‏‎ (17 revisions)
72. Baseband Meets CPU‏‎ (17 revisions)
73. Compressed Sensing vs JPEG‏‎ (17 revisions)
74. Energy Efficient AXI Interface to Serial Link Physical Layer‏‎ (17 revisions)
75. A Snitch-based Compute Accelerator for HERO‏‎ (17 revisions)
76. Fast Accelerator Context Switch for PULP‏‎ (17 revisions)
77. Optimal System Duty Cycling for a Mobile Health Platform‏‎ (16 revisions)
78. LightProbe‏‎ (16 revisions)
79. Rethinking our Convolutional Network Accelerator Architecture‏‎ (16 revisions)
80. 3D Turbo Decoder ASIC Realization‏‎ (16 revisions)
81. Heterogeneous SoCs‏‎ (16 revisions)
82. Neural Network Algorithms and Interfaces with Accelerators for Embedded Platforms with Real World Applications‏‎ (16 revisions)
83. Wireless In Action Data Streaming in Ski Jumping (1 B/S)‏‎ (16 revisions)
84. PULP-Shield for Autonomous UAV‏‎ (15 revisions)
85. DMA Streaming Co-processor‏‎ (15 revisions)
86. Advanced 5G Repetition Combining‏‎ (15 revisions)
87. Digital Beamforming for Ultrasound Imaging‏‎ (15 revisions)
88. Vector Processor for In-Memory Computing‏‎ (15 revisions)
89. Digital Transmitter for Mobile Communications‏‎ (15 revisions)
90. Active-Set QP Solver on FPGA‏‎ (15 revisions)
91. Design of an LTE Module for the Internet of Things‏‎ (15 revisions)
92. Big Data Analytics Benchmarks for Ara‏‎ (15 revisions)
93. Elliptic Curve Accelerator for zkSNARKs‏‎ (15 revisions)
94. Completed‏‎ (15 revisions)
95. PULP in space - Fault Tolerant PULP System for Critical Space Applications‏‎ (14 revisions)
96. Ultra low power wearable ultrasound probe‏‎ (14 revisions)
97. Application Specific Frequency Synthesizers (Analog/Digital PLLs)‏‎ (14 revisions)
98. Heroino: Design of the next CORE-V Microcontroller‏‎ (14 revisions)
99. Beamspace processing for 5G mmWave massive MIMO on GPU‏‎ (14 revisions)
100. ASIC Design of a Gaussian Message Passing Processor‏‎ (14 revisions)

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