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Showing below up to 50 results in range #61 to #110.
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- A Trustworthy Three-Factor Authentication System (14:01, 26 March 2015)
- A Multiview Synthesis Core in 65 nm CMOS (15:49, 13 May 2015)
- Feature Extraction with Binarized Descriptors: ASIC Implementation and FPGA Environment (15:57, 13 May 2015)
- Real-time View Synthesis using Image Domain Warping (16:04, 13 May 2015)
- Evolved EDGE Physical Layer Incremental Redundancy Architecture (14:12, 27 May 2015)
- MatPHY: An Open-Source Physical Layer Development Framework (14:14, 27 May 2015)
- Autonomous Smart Watches: Hardware and Software Desing (11:59, 28 July 2015)
- A Wearable System for long term monitoring of human physiological parameters with E skin sensors (11:59, 28 July 2015)
- Eye movements (14:43, 29 July 2015)
- RazorEDGE: An Evolved EDGE DBB ASIC (17:15, 1 September 2015)
- Hardware/software co-programming on the Parallella platform (14:26, 2 September 2015)
- Real-Time Stereo to Multiview Conversion (09:09, 23 October 2015)
- Active-Set QP Solver on FPGA (13:09, 2 November 2015)
- Vector Processor for In-Memory Computing (13:10, 2 November 2015)
- An FPGA-Based Testbed for 3G Mobile Communications Receivers (16:42, 9 December 2015)
- EvaLTE: A 2G/3G/4G Cellular Transceiver FMC (17:07, 17 December 2015)
- EvalEDGE: A 2G Cellular Transceiver FMC (17:10, 17 December 2015)
- Design of a Digital Audio Module for Ultra-Low Power Cellular Applications (18:15, 17 December 2015)
- A Wireless Sensor Network for a Smart LED Lighting control (12:02, 27 January 2016)
- Bateryless Heart Rate Monitoring (15:21, 28 January 2016)
- Real-Time Optical Flow Using Neural Networks (11:22, 5 February 2016)
- Scattering Networks for Scene Labeling (11:29, 5 February 2016)
- Improving Scene Labeling with Hyperspectral Data (11:29, 5 February 2016)
- FFT-based Convolutional Network Accelerator (11:30, 5 February 2016)
- Real-Time Pedestrian Detection For Privacy Enhancement (13:17, 5 February 2016)
- Autonomous Smart Watches: Toward an ultra low power microphone detector with events classification (12:11, 16 February 2016)
- Low-power Clock Generation Solutions for 65nm Technology (19:37, 3 March 2016)
- Final Report (10:22, 10 March 2016)
- NextGenChannelDec (15:31, 13 April 2016)
- ASIC Implementation of High-Throughput Next Generation Turbo Decoders (11:12, 14 April 2016)
- Channel Estimation and Equalization for LTE Advanced (11:13, 14 April 2016)
- Time Synchronization for 3G Mobile Communications (11:22, 14 April 2016)
- Signal to Noise Ratio Estimation for 3G standards (11:23, 14 April 2016)
- High-Throughput Hardware Implementations of Authenticated Encryption Algorithms (13:13, 14 April 2016)
- GSM Voice Capacity Evolution - VAMOS (17:45, 14 April 2016)
- 4th Generation Synchronization (17:56, 14 April 2016)
- Baseband Processor Development for 4G IoT (17:58, 14 April 2016)
- Beat DigRF (17:58, 14 April 2016)
- Research (19:38, 14 April 2016)
- Spatio-Temporal Video Filtering (19:40, 14 April 2016)
- 3D Turbo Decoder ASIC Realization (12:33, 15 April 2016)
- Implementing Hibernation on the ARM Cortex M0 (11:59, 20 June 2016)
- Digital Transmitter for Cellular IoT (16:41, 17 July 2016)
- An FPGA-Based Evaluation Platform for Mobile Communications (16:05, 21 July 2016)
- Non-binary LDPC Decoder for Deep-Space Optical Communications (16:05, 21 July 2016)
- Software (13:45, 8 August 2016)
- Towards Self Sustainable UAVs (20:45, 9 August 2016)
- Ultra Low Power Conversion Circuit For Batteryless Applications (17:46, 10 August 2016)
- Libria (09:35, 26 August 2016)
- Change-based Evaluation of Convolutional Neural Networks (18:04, 29 August 2016)
