Difference between revisions of "Integrated Information Processing"
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Latest revision as of 11:34, 1 June 2022
The Integrated Information Processing (IIP) Group carries out research in the following areas:
The main focus of the IIP Group is on theory, algorithm design, and hardware implementation of new technologies for beyond fifth-generation (5G) wireless communication systems. The projects in this area focus on emerging communication technologies including massive MIMO, millimeter-wave (mmWave) and terahertz communication, cell-free massive MIMO, intelligent reflective surfaces, ultra low-latency short-packet transmission, and testbed design for massive MIMO prototyping.
Indoor positioning and outdoor positioning in urban scenarios of mobile phones is a notoriously difficult task. Recently, tools from machine learning have been used to perform positioning from channel-state information (CSI). The projects in this area focus on channel charting, a new technology developed in the IIP group that enables self-supervised positioning from CSI without the users' consent.
Modern wireless systems are equipped with large arrays of parallel radio-frequency (RF) chains. Such RF chains are extremely accurate sensors that can be used not only for high-rate data transmission but also for sensing. The projects in the emerging area of simultaneous sensing and communication (SISCO) are on imaging the area next to the antenna array and on classification of user behavior using machine learning techniques.
Processing in memory (PIM) moves computation into memories with the goal of improving throughput and energy-efficiency compared to traditional von Neumann-based architectures. The projects in this area are in designing all-digital and semi-custom PIM accelerators (application-specific integrated circuits) that can be fabricated with conventional CMOS technologies and for emerging applications in machine learning, signal processing, and wireless communication.
Always-on sensors that continuously monitor the environment for certain events must operate with energy-efficient classification and detection pipelines. The projects in this area build upon a novel classification pipeline developed in the IIP group called analog-to-feature (A2F) conversion that directly acquires features in the analog domain using non-uniform wavelet sampling (NUWS). Possible applications are real-time sensing and classification of EEG, ECG, RF, and audio signals.
Nonlinearities play a critical role in a large number of signal processing applications, including the areas of wireless communication, image processing, and machine learning. Unfortunately, analyzing the fundamental properties of nonlinear systems and estimating signals from nonlinear measurements are notoriously difficult tasks. The projects in this area focus on analyzing nonlinear systems and developing new algorithms that compensate nonlinear behavior or estimate quantities from nonlinear observation models.
Numerical optimization finds use in a large number of fields, including wireless communications, machine learning, imaging, physics, operations research, and control. In a growing number of embedded applications, convex as well as nonconvex optimization problems must be solved in real-time and with stringent latency constraints. The projects in this area focus on the design of novel algorithms that enable real-time numerical optimization at low latency and in a hardware friendly manner.
Machine learning and deep neural networks are currently revolutionizing a variety of applications, including the well-established field of digital signal processing. The projects in this area focus on the design of novel algorithms that enable real-time audio signal processing using emerging tools from digital signal processing and machine learning. The ultimate goal is their realization on digital signal processors (DSPs) or hardware accelerators (FPGAs and ASICs).
- Weak-strong massive MIMO communication with low-resolution ADCs
- Low-Complexity MIMO Detection
- Low-power time synchronization for IoT applications
- Forward error-correction ASIC using GRAND
- Cell-Free mmWave Massive MIMO Communication
- ASIC Implementation of Jammer Mitigation
- VLSI Implementation of a Systolic Array for LMMSE Detection in mmWave Massive MIMO-OFDM
- Reconfigurable Fully-Unrolled 2D-FFT Core Generator for Multi-Antenna mmWave Communication
- ASIC Implementation of a Low-Power mmWave Massive MIMO Equalizer with a Custom Number Format
- Low Resolution Neural Networks
- VLSI Design of an Asynchronous LDPC Decoder
- Novel Methods for Jammer Mitigation
- FFT HDL Code Generator for Multi-Antenna mmWave Communication
- Low-Resolution 5G Beamforming Codebook Design
- Practical Reconfigurable Intelligent Surfaces (RIS)
- Peak-to-average power Reduction
- Self-Supervised User Positioning in Cell-Free Massive MIMO Systems
- Signal Acquisition and Clock Offset Compensation for High-Rate Pulse UWB PHYs
- Through Wall Radar Imaging using Machine Learning
- Passive Radar for UAV Detection using Machine Learning
- Accelerating Applications Relying on Matrix-Vector-Product-Like Operations
- XNORLAX: Fused XNOR-LATCH Custom-Standard-Cell-Based Processing-in-Memory
- Design-Space Exploration of Low-Resolution Matrix-Vector Multipliers
- Beamspace processing for 5G mmWave massive MIMO on GPU
- Semi-Custom Digital VLSI for Processing-in-Memory