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• A Waypoint-based Navigation System for Nano-Size UAVs in GPS-denied Environments
  4 KB (605 words) - 16:35, 20 February 2018
• Optimal System Duty Cycling for a Mobile Health Platform
  ...hanism both for sub-systems on the chip level as well as components on the system level, e.g. flash memory or radio ICs. This project focuses on chip-level d ...dictates battery size, the most critical factor in any volume-constrained system.
  4 KB (597 words) - 16:57, 12 July 2022
• Optimal System Duty Cycling
  0 bytes (0 words) - 14:44, 23 May 2018
• A Wearable Wireless Kidney Function Monitoring System For BioMedical Applications
  ..., non-invasive method to measure kidney performance via an external sensor system to avoid the use of urinary catheters for this subgroup of patients, thereb ...classification accuracy, and energy efficiency and to further optimize the system. The work includes the modeling and design of a suited impedance sensor, it
  6 KB (857 words) - 15:37, 10 November 2020
• Multisensory system for performance analysis in ski jumping (M/1-2S/B)
  ...roject focusses on the development of an unobtrusive multisensory embedded system to assist coaches to better quantify jumping trajectories of athletes. With ...perceptible to the athlete so as not to disturb his/her sensitive jumping system.
  6 KB (820 words) - 12:13, 23 July 2023
• PULP in space - Fault Tolerant PULP System for Critical Space Applications
  ...pikes due to cosmic rays being captured by sequential elements, taking the system into a faulty state.
  6 KB (980 words) - 14:46, 2 June 2021
• Fault Tolerant OpenPULP System for Critical Spacial Applications
  #REDIRECT [[PULP in space - Fault Tolerant PULP System for Critical Space Applications]]
  88 bytes (13 words) - 13:10, 9 August 2019
• Neuromorphic Intelligence In An Embedded System in Collaboration with AiCTX
  ...rphic intelligence using their processor to build a whole working embedded system. The student will deal with both hardware and software building a prototype * Motivation to build and test a real system
  5 KB (692 words) - 15:45, 10 November 2020
• High-throughput Embedded System For Neurotechnology in collaboration with INI
  ...ock diagram, which involves both the programming of a Low power FPGA and a System on Chip with ARM cortex-M4F and Bluetooth low energy 5.0. The project is qu * Motivation to build and test a real system
  4 KB (526 words) - 15:48, 10 November 2020
• Manycore System on FPGA (M/S/G)
  <!-- Manycore System on FPGA --> At ETH, we are developing our own many-core system called MemPool [1]. It boasts 256 lightweight 32-bit Snitch cores developed
  8 KB (1,319 words) - 10:41, 6 July 2021
• Implementation of a Heterogeneous System for Image Processing on an FPGA
  0 bytes (0 words) - 12:48, 2 November 2020
• (M): A Flexible Peripheral System for High-Performance Systems on Chip
  0 bytes (0 words) - 12:16, 2 November 2020
• Implementation of a Heterogeneous System for Image Processing on an FPGA (S)
  ...s is to have Halide programmed image processing kernels running on an HERO system implemented on an FPGA.
  5 KB (737 words) - 17:26, 2 November 2020
• A Flexible Peripheral System for High-Performance Systems on Chip (M)
  <!-- (M): A Flexible Peripheral System for High-Performance Systems on Chip --> One of the most tedious and error-prone steps is assembling a peripheral system with the required and desired IO; this usually involves adapting existing p
  11 KB (1,675 words) - 15:40, 15 March 2021
• Implementation of a Heterogeneous System for Image Processing on an FPGA (M)
  #REDIRECT [[Implementation of a Heterogeneous System for Image Processing on an FPGA (S)]]
  90 bytes (13 words) - 17:26, 2 November 2020
• Physical Implementation of MemPool, PULP's Manycore System (1M/1-2S)
  ...s private memory banks---this, however, impacts the programmability of the system. ...eved through a cache hierarchy, which impacts the energy efficiency of the system through its non-negligible power consumption.
  8 KB (1,196 words) - 10:41, 6 July 2021
• Physical Implementation of MemPool, PULP's Manycore System
  #REDIRECT [[Physical Implementation of MemPool, PULP's Manycore System (1M/1-2S)]]
  82 bytes (11 words) - 17:40, 2 November 2020
• Integration Of A Smart Vision System
  ...ludes them from being used in a portable system. Furthermore, surveillance system typically do not come with any localized intelligence, so their recorded da In this project, a novel, distributed and energy-efficient surveillance system will be brought up and optimized by the student.
  3 KB (433 words) - 15:36, 4 August 2022
• Peripheral Event Linking System for Real-time Capable Energy Efficient SoCs
  <!-- Peripheral Event Linking System For Real-Time Capable Energy-Efficient SoCs (M/1-2S) --> ...unities are limited due to the necessity to retain major parts of the main system memory due to the use of static random access memory (SRAM) for code execut
  8 KB (1,127 words) - 19:54, 1 March 2023
• Ultrasound Doppler system development
  ...ormation on the structure of musculoskeletal tissues, organs, and vascular system. The velocity of liquid flows (as for arteries and veins) can be measured b Preliminary results of custom syringe pump system:
  3 KB (363 words) - 17:18, 3 May 2024

Page text matches

• Design and Implementation of an Approximate Floating Point Unit
  ...tion of the FPUs and therefore reduce the overall power consumption of the system. Sharing FPUs allows to employ several different units, which can be either ...nd is a promising approach to further improve the energy efficiency of the system. One way to approximate FP-operations is to use Newton's method to compute
  3 KB (377 words) - 10:58, 21 February 2018
• Quantum Key Secured 100 Gbit/s Payload Encryption and its High-Speed Network Interfaces
  ...egory:Qcrypt|QCRYPT]] was the development of the 100 Gbit/s link encryptor system with a variety of optical interfaces on the plain-text side and a 100 Gbit ...main focus lay on the development of a second version of the PCB for this system. The layer stackup was modified to enhance the high-frequency quality of th
  2 KB (359 words) - 20:06, 17 February 2015
• High-Throughput Authenticated Encryption Architectures based on Block Ciphers
  ''2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC)'', Santa Cruz, California, USA, 7-10 Oct 2012
  3 KB (392 words) - 12:25, 26 March 2015
• Real-time View Synthesis using Image Domain Warping
  ...erent mobile platforms, most productions are captured with one acquisition system at fixed parameters. Examples for content adaption algorithms are content-a ...ons and VLSI Implementations", ''VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design, volume 418 of IFIP Advances in Information and Communicatio
  4 KB (520 words) - 16:04, 13 May 2015
• Feature Extraction with Binarized Descriptors: ASIC Implementation and FPGA Environment
  ...IC/FPGA system which implements the first three steps of this process. Our system is able to extract SKB features from one 720p video stream in real time (30
  3 KB (487 words) - 15:57, 13 May 2015
• Pirmin Vogel
  ...ing and embedded heterogeneous systems on a chip with a focus on operating system, driver, runtime and programming model support for efficient and transparen
  1 KB (193 words) - 15:39, 3 March 2020
• Image Sensor Interface and Pre-processing
  ...the image is being acquired and forward this information to a larger host system for further processing. ...algorithm steps directly ion hardware and interface with the host computer system.
  3 KB (357 words) - 18:53, 6 December 2014
• High-Resolution Large-Bandwidth Delta-Sigma A/D Converters in Ultra-Scaled CMOS
  ...bits. Such data converters are intended to be embedded in a mostly digital system, and this legitimates the adoption of ultra-scaled CMOS technologies from w
  2 KB (277 words) - 17:28, 29 January 2014
• Wireless Biomedical Signal Acquisition Device
  Although the wireless and battery-powered nature of this system reduces the impact of mains interference, its amplitude might nonetheless b ...ed by an off-the-shelf mobile phone battery which is sufficient to run the system for several hours - the battery life-time is mainly limited by the Bluetoot
  2 KB (280 words) - 10:54, 10 March 2015
• Benjamin Weber
  his PhD thesis entitled "An Evolved EDGE System on Chip for the Cellular
  894 bytes (115 words) - 17:17, 30 November 2021
• Digitally-Controlled Analog Subtractive Sound Synthesis
  [[Category:System on Chips for IoTs]] [[Category:Biomedical System on Chips]]
  5 KB (597 words) - 12:56, 4 December 2021
• MatPHY: An Open-Source Physical Layer Development Framework
  ...upper layers of the OsmocomBB GSM protocol stack. The functionality of the system is verified with a testbed comprising a base station and a receiver board w
  3 KB (360 words) - 14:14, 27 May 2015
• Evolved EDGE Physical Layer Incremental Redundancy Architecture
  ...ssor and the unit where RLC blocks are processed for IR is attached to the system processor. The decoding of the RLC blocks takes place on a PHY Digital Sign
  3 KB (397 words) - 14:12, 27 May 2015
• A Novel Constrained-Viterbi Algorithm with Linear Equalization and Grouping Assistance
  ...ons such as those in the time-duplexing high speed packet access (TD-HSPA) system.
  2 KB (266 words) - 10:43, 9 February 2015
• IcySoC
  ...terms of parallelism, performances and robustness. One has to revisit the system design in terms of usage of hardware accelerators, heterogeneous or homogen
  4 KB (568 words) - 12:48, 9 February 2015
• Exploitation of Inherent Error Resilience of Wireless Systems under Unreliable Silicon
  ...communication system (receive side). Bottom: Throughput performance of the system including re-transmissions with hybrid-ARQ for various defect rates.]] ...Q operation that is critical for the average throughput performance of the system.
  2 KB (343 words) - 13:56, 9 February 2015
• Data Mapping for Unreliable Memories
  ...channel with unreliable memory. Bottom: Bit-error rate performance of the system assuming convolutional coding for different data representations.]] ...ion-specific cost functions) substantially increases the robustness of the system to unreliable memory operation, compared to the data representations most c
  3 KB (352 words) - 13:56, 9 February 2015
• Design and Implementation of ultra low power vision system
  ...t role in this type of devices and in general in battery-operated embedded system. : Interest in Computer Architectures at system level
  2 KB (342 words) - 16:46, 11 February 2015
• A Wireless Sensor Network for a Smart LED Lighting control
  ...sor and actuator networks (WSANs) possible. These networks are distributed system consisting of nodes with sensors, intelligence and actuator interconnected ...e power consumption reduction, reliability, functionality and optimize the system.
  3 KB (487 words) - 12:02, 27 January 2016
• Ultra Low Power Wake Up Radio for Wireless Sensor Network
  ...a low power radio wake up receiver can reduce the power consumption of the system while still keeping its response time low. Another role of the wake-up radi ...and receiver and it could include . Measurements on the performance of the system will be performed from the students in order to evaluate the distance, powe
  4 KB (613 words) - 19:54, 9 February 2015

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