Pages with the most categories

Showing below up to 100 results in range #31 to #130.

View (previous 100 | next 100) (20 | 50 | 100 | 250 | 500)

31. Visualizing Functional Microbubbles using Ultrasound Imaging‏‎ (12 categories)
32. PULPonFPGA: Lightweight Virtual Memory Support - Coherency Extensions‏‎ (12 categories)
33. PULPonFPGA: Lightweight Virtual Memory Support - Multi-Level TLB‏‎ (12 categories)
34. Efficient Synchronization of Manycore Systems (M/1S)‏‎ (12 categories)
35. An RPC DRAM Implementation for Energy-Efficient ASICs (1-2S)‏‎ (12 categories)
36. PULPonFPGA: Lightweight Virtual Memory Support - Page Table Walker‏‎ (12 categories)
37. Minimum Variance Beamforming for Wearable Ultrasound Probes‏‎ (12 categories)
38. Streaming Integer Extensions for Snitch (M/1-2S)‏‎ (12 categories)
39. Ultrasound based hand gesture recognition‏‎ (12 categories)
40. BCI-controlled Drone‏‎ (12 categories)
41. Implementing DSP Instructions in Banshee (1S)‏‎ (12 categories)
42. Exploratory Development of a Unified Foundational Model for Multi Biosignal Analysis‏‎ (12 categories)
43. Transforming MemPool into a CGRA (M)‏‎ (12 categories)
44. Real-Time ECG Contractions Classification‏‎ (12 categories)
45. Compression of Ultrasound data on FPGA‏‎ (12 categories)
46. Implementation of a Small and Energy-Efficient RISC-V-based Vector Accelerator (1M)‏‎ (11 categories)
47. SCMI Support for Power Controller Subsystem‏‎ (11 categories)
48. Efficient Memory Stream Handling in RISC-V-based Systems (M/1-2S)‏‎ (11 categories)
49. Creating a HDMI Video Interface for PULP‏‎ (11 categories)
50. Enabling Efficient Systolic Execution on MemPool (M)‏‎ (11 categories)
51. BigPULP: Shared Virtual Memory Multicluster Extensions‏‎ (11 categories)
52. Design of a Scalable High-Performance and Low-Power Interface Based on the I3C Protocol (1-3S/B)‏‎ (11 categories)
53. Memory Augmented Neural Networks in Brain-Computer Interfaces‏‎ (11 categories)
54. Building an RTL top level for a Mempool-based Heterogeneous SoC (M/1-3S)‏‎ (11 categories)
55. Event-based navigation on autonomous nano-drones‏‎ (11 categories)
56. Fast Accelerator Context Switch for PULP‏‎ (11 categories)
57. CLIC for the CVA6‏‎ (11 categories)
58. Machine Learning on Ultrasound Images‏‎ (11 categories)
59. EEG-based drowsiness detection‏‎ (11 categories)
60. Towards the Ariane Desktop: Display Output for Ariane on FPGA under Linux (S/B/G)‏‎ (11 categories)
61. Sound-Based Vehicle Classification and Counting (1-2S)‏‎ (11 categories)
62. Multi-Modal Environmental Sensing With GAP9 (1-2S)‏‎ (11 categories)
63. Real-time Linux on RISC-V‏‎ (11 categories)
64. Development of statistics and contention monitoring unit for PULP‏‎ (11 categories)
65. Resource Partitioning of Caches‏‎ (11 categories)
66. A RISC-V fault-tolerant many-core accelerator for 5G Non-Terrestrial Networks (1-2S/B)‏‎ (11 categories)
67. A Wireless Sensor Network for HPC monitoring‏‎ (11 categories)
68. Training and Deploying Next-Generation Quantized Neural Networks on Microcontrollers‏‎ (11 categories)
69. Mixed-Precision Neural Networks for Brain-Computer Interface Applications‏‎ (11 categories)
70. LLVM and DaCe for Snitch (1-2S)‏‎ (11 categories)
71. Waterflow Monitoring with Doppler Ultrasound (1S)‏‎ (11 categories)
72. Approximate Matrix Multiplication based Hardware Accelerator to achieve the next 10x in Energy Efficiency: Full System Intregration‏‎ (11 categories)
73. EEG earbud‏‎ (11 categories)
74. Modeling FlooNoC in GVSoC (S/M)‏‎ (11 categories)
75. Evaluating SoA Post-Training Quantization Algorithms‏‎ (11 categories)
76. Non-blocking Algorithms in Real-Time Operating Systems‏‎ (11 categories)
77. Fault-Tolerant Floating-Point Units (M)‏‎ (11 categories)
78. In-ear EEG signal acquisition‏‎ (11 categories)
79. Spectrometry for Environmental Monitoring (1-2S/M)‏‎ (11 categories)
80. Predict eye movement through brain activity‏‎ (11 categories)
81. Structural Health Monitoring (SHM) System (1-2S/M)‏‎ (11 categories)
82. Routing 1000s of wires in Network-on-Chips (1-2S/M)‏‎ (11 categories)
83. A Snitch-based Compute Accelerator for HERO (M/1-2S)‏‎ (11 categories)
84. Cerebellum: Design of a Programmable Smart-Peripheral for the Ariane Core‏‎ (11 categories)
85. Time Gain Compensation for Ultrasound Imaging‏‎ (11 categories)
86. A Flexible FPGA-Based Peripheral Platform Extending Linux-Capable Systems on Chip (1-3S/B)‏‎ (11 categories)
87. Extension and Evaluation of TinyDMA (1-2S/B/2-3G)‏‎ (11 categories)
88. Running Rust on PULP‏‎ (11 categories)
89. A Flexible Peripheral System for High-Performance Systems on Chip (M)‏‎ (11 categories)
90. Smart e-glasses for concealed recording of EEG signals‏‎ (11 categories)
91. Development Of An FPGA-Based Optoacoustic Image Reconstruction Platform for Clinical Applications‏‎ (10 categories)
92. PULP Freertos with LLVM‏‎ (10 categories)
93. A Unified Compute Kernel Library for Snitch (1-2S)‏‎ (10 categories)
94. Timing Channel Mitigations for RISC-V Cores‏‎ (10 categories)
95. Machine Learning for extracting Muscle features from Ultrasound raw data‏‎ (10 categories)
96. Deep Learning-based Global Local Planner for Autonomous Nano-drones‏‎ (10 categories)
97. Design of a Reconfigurable Vector Processor Cluster for Area Efficient Radar Processing (1M)‏‎ (10 categories)
98. Ibex: Tightly-Coupled Accelerators and ISA Extensions‏‎ (10 categories)
99. Machine Learning for extracting Muscle features using Ultrasound‏‎ (10 categories)
100. PULPonFPGA: Hardware L2 Cache‏‎ (10 categories)
101. A Novel Execution Scheme for Ultra-tiny CNNs Aboard Nano-UAVs‏‎ (10 categories)
102. Enhancing our DMA Engine with Fault Tolerance‏‎ (10 categories)
103. On-Board Software for PULP on a Satellite‏‎ (10 categories)
104. Graph neural networks for epileptic seizure detection‏‎ (10 categories)
105. Design and Implementation of a Fully-digital Platform-independent Integrated Temperature Sensor Enabling DVFS in Open-source Tapeouts (1-3S/B)‏‎ (10 categories)
106. Softmax for Transformers (M/1-2S)‏‎ (10 categories)
107. Taping a Safer Silicon Implementation of Snitch (M/2-3S)‏‎ (10 categories)
108. Low Latency Brain-Machine Interfaces‏‎ (10 categories)
109. An FPGA-Based Testbed for 3G Mobile Communications Receivers‏‎ (10 categories)
110. Wireless Communication Systems for the IoT‏‎ (10 categories)
111. Extend the RI5CY core with priviledge extensions‏‎ (10 categories)
112. Big Data Analytics Benchmarks for Ara‏‎ (10 categories)
113. Enhancing our DMA Engine with Vector Processing Capabilities (1-2S/B)‏‎ (10 categories)
114. Advanced Physical Design: Reinforcement Learning for Macro Placement and Mix-Placer (B/1-2S)‏‎ (10 categories)
115. Ottocore: A Minimal RISC-V Core Designed for Teaching (B/2G)‏‎ (10 categories)
116. Implementation of the RISC-V Bit Manipulation (RVB) extensions for our RISC-V core‏‎ (10 categories)
117. Smart Agriculture System (1-2S)‏‎ (10 categories)
118. Next Generation Synchronization Signals‏‎ (10 categories)
119. Fast Simulation of Manycore Systems (1S)‏‎ (10 categories)
120. Designing a Scalable Miniature I/O DMA (1-2B/1-3S/M)‏‎ (10 categories)
121. Heroino: Design of the next CORE-V Microcontroller‏‎ (10 categories)
122. Integrating Ultrasound Technology into a Fitness Tracking Device (1M, 2 B/S)‏‎ (10 categories)
123. Design of a CAN Interface to Enable Reliable Sensors-to-Processors Communication for Automotive-oriented Embedded Applications (1M)‏‎ (10 categories)
124. StoneEDGE: An EC-GSM-IoT and Evolved EDGE PHY ASIC‏‎ (10 categories)
125. ASR-Waveformer‏‎ (10 categories)
126. Accelerator for Spatio-Temporal Video Filtering‏‎ (10 categories)
127. Ultrasound Low power WiFi with IMX7‏‎ (10 categories)
128. BirdGuard‏‎ (10 categories)
129. Design of an Energy-Efficient Ethernet Interface for Linux-capable Systems‏‎ (10 categories)
130. Air Quality Prediction in Office Rooms (1-2S/M)‏‎ (10 categories)

View (previous 100 | next 100) (20 | 50 | 100 | 250 | 500)